I've never put everything into a single LTSpice worksheet like this before: I find it fascinating. You can really pull apart a circuit to see what makes it tick, before solder ever hits the iron.

Power supply ripple, frequency response, gain, and crosstalk can be established. You can look at turn on and turn off transients, inrush currents, and conductance angle, and check peak currents in the filter capacitors. It's all there if you care to peek in and poke around.

I'm such a huge fan of LTSpice...

The only problem, really, is it is too perfect: all devices are perfectly matched, every part value is exact, and the temperature is always 25 C. Ground loops, wiring inductance, and thermal runaway do not exist. So no, of course there are no guarantees - but as a tool to get you 90% of the way there with the minimum of fuss and bother it is truly indispensable.

Actually I find the more experience you have the more useful LTSpice...

There are various tricks, like parallel input devices and active current sources, that I have avoided here in the interests of simplicity. If you want to go down that road, you can get an idea where it leads, here. Instead, the circuit below is basically a JFET version of my old 6DJ8 amp, here. A single JFET was getting me nowhere in terms of output impedance - around 10kohms! - so I moved to a compound stage buffering each amplifier with a source follower.

Noise and distortion figures look okay. The gain is only 30 dB. A bit low. The main trick is the PSRR, which is awful. The two stage circuit actually amplifies the power supply noise onto the output. So considerable effort must be put into the power supply regulation and filtering. I note that this is pretty much par for the course with this circuit topology where resistors are used instead of current sources on the JFET drains.

The circuit below leaves out the usual RC filter inserted between the power supply...

The discussion thread at the headphone forum is here, but I wanted to throw out the problem to the general blog-reading community here at diyaudio to see if anyone can nail this.

The earthed chassis (light blue) must connect to the circuit common i.e. "ground" (pale green). I do not know where the best place on the circuit ground is to tie that connection.

Suggestions please!

(COM and GND are completely equivalent pads on the circuit board, while IN- and OUT- also pads on the board but physically further away on the ground plane.)

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Answer: as long as it connects at one point only, or the same point of both channels, it doesn't seem to matter at all. I have it connected at the ground tab of the headphone jack and that seems to be as good as anywhere.

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The noise was in fact magnetic interference emanating from the transformers. Grounding layout changes / electrostatic...

Original version is here.

I've been meaning to get around to updating this by folding in the improvements to the diamond buffer stage made during development of the Sapphire 3 headphone amplifier. Here is the first look of the bboard v2 under LTSpice.

I've gone back to simple emitter resistors on the input, running under much lower current to keep the input impedance high. The output is simplified to a basic Sziklai compound transistor pair with the bulk of the bias current running in the second transistor.

In terms of distortion, for line level output level, CCS loaded input has no advantage. I'll have to double-check PSRR and a few other things before signing off on this version though.

FYI only, not a production circuit.

LTSpice copy (protection diodes removed) of the original JE-990 circuit. Even with BC327/337 subbed in for all the original transistors the simulation works without further modification.

C1 seems to be critical for stability. C2 and C3 damp overshoot seen on the simulated square wave response, hinted at by the high frequency rise in frequency response shown in the screen grab below.

My impression is that this circuit is of the heavily optimized, no-stone-left-untouched variety.

Sourced from m.nats page and The John Hardy Company.

You input the headphone sensitivity and impedance, and it spits out what I think is the ideal amplifier gain.

Even if you disagree (personal preference, difference input levels, etc.), the difference will be consistent regardless of headphone as long as the specified parameters are correct.

The gain value setting is tailored to normal line level input and listening fairly loud with the volume control at 9~10 o'clock. The output series resistance is assumed to be zero ohms.

Adjust as desired, and note that 3~6 dB either way will still be a usable. If your amp has a large output series resistance the gain Av should be scaled up as,

(Routput + headphone Z)/(headphone Z)

Back at the dawn of time one of the first audio circuits I worked on was the Gainclone, followed closely by The Dac of the Klones (Oh my, the nostalgia!) and of course the Phonoclone.

The VSPS was a side-project that grew out of the Phonoclone, and actually ended up first out of the gate as a working circuit.

Apart from the general design philosophy (low parts count, simplicity, careful layout and grounding) it has no particular link to 47 Labs. While the concept of a non-inverting op amp active phonostage is nothing original the circuit is mine, particularly the configuration and values of the RIAA filter which I calculated and simulated myself. The rest is an amalgam from a dozen or so different sources, textbooks, datasheets and application notes &c. All the values are quite carefully chosen.

That said I've always put the circuits and everything else on the internet, with source attribution as I felt necessary. The boards and kits came...

Recently I spent some time updating the diamond buffer of Sapphire headphone amp circuit. Later I stumbled on Kevin Gilmore's headphone amp circuit. Well, I'd read it before, but it had slipped my mind.

On seeing the Gilmore circuit again the thought process re. a Sapphire+Gilmore went something as follows,

"Toss out op amp, convert the Gilmore dual-LTP front end to bipolar, bolt the Sapphire3 buffer stage to the back, and substitute in the Sapphire3 current sources. Wrap in a mild feedback loop."

The result is shown attached. The Vbe multiplier is still a simple resistor (R33) ... that may need to be refined to add thermal throttling. The offset servo is not shown, but the action is shown as Vadj. Alternatively a trim pot would be placed between R30 and R32 to provide a small measure of offset adjustment. Most of the open loop gain is controlled by R14,R15 ... it seems to me that some work could still be done in that area. Despite going...

I've added an additional RC filter stage (R3, C4 in the schematic below) before the Zener diode, substantially reducing the amount or ripple on the transistor base by cleaning up the voltage applied to the Zener reference. (The original Z-reg is described here.)

Circuit shows C2 with a value of 300 uF. Typically much larger values are used. I kept the filter capacitance to a minimum here to show circuit working with a reasonably high ripple (1 V p-p) on the input. The rectifier diodes used here are of no particular consequence, I just wanted the simulation to generate a realistic sawtooth for the input.

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OK, this doesn't do as much as I originally thought. The improvement is mostly below 100 Hz, whereas the ripple is mostly in the 100Hz-1kHz band. There's perhaps 3 dB less output ripple, but that's about it. You can verify this yourself in LTSpice, just cut the wire between C4 and the junction or R1-R3 and rerun the sim.

A couple of years ago I built a standard op amp + diamond buffer headphone amplifier, called the Sapphire.

My original circuit (Sapphire 1.x) was the simple four transistor four resistor diamond buffer of the LH0002. Later small resistors (Sapphire 2.0) were added to the emitters of the driver transistors to boost the output bias current.

In this next go-round (Sapphire 3.0), I've replaced the emitter resistors with current sources. This provides a significant improvement in PSRR, over 20 dB in simulation. The output pair has been reinforced in a Sziklai configuration for lower distortion, and the primary output transistors five-way paralleled for improved thermal stability. The output impedance is 1~2 ohms, limited primarily by the output resistor.

It simulates to <-100 dB harmonics for 0 dB (1 V rms) output into 60 ohms. The total circuit standing current is less than 50 mA per channel.

LTSpice files below. R5,R6 on LTSpice...