In your noise measurements fft graph is pretty flat. Don’t use one point or bin at specific frequency. Look where average of that fft graph is on the y scale (dbV or V/rtHz). Best to use values from several hundred Hz to several kHz. As usual, use averaging and 1/24 octave smoothing, if available.
Without touching any gain control, adjust variable resistor till reading is + 3 dBV or, 1.41 x voltage higher.
That should give the true value.
Without touching any gain control, adjust variable resistor till reading is + 3 dBV or, 1.41 x voltage higher.
That should give the true value.
Well, I’m sure I can get 100 pV/rtHz noise floor if I switch off LNA power supply.
Using one “best” bin for determining LNA noise floor is creative but wrong method. Noise floor of your LNA is likely around 500 – 700 pV/rtHz, depending on type and number of input transistors. I.e. going from 3 to 4 input transistors will reduce noise by 15%. 375 pV/rtHz could be achieved using more than 8 low noise JFETs , but not with only 3 – 4 transistors at input.
You could use dBV value that corresponds to average noise level above 1 kHz with shorted input and then adjust variable resistor at the input till level is + 3 dBV from shorted input reading.
8 kΩ LNA input impedance is in parallel with 1 kΩ calibration resistor. So, we have 890 Ω at the input and correct noise level is 3.8 nV/rtHz instead of 4 nV/rtHz. I don’t know if current noise will dominate over voltage noise If BJT is used at the LNA input with kΩ range resistors as calibration source.
Therefore, it is good to crosscheck with 62 Ω resistor which will produce 1 nV/rtHz noise density. But, here we have another problem: LNA noise and resistor noise add up and it is very important to know LNA noise, to be able to know what reading will be correct.
Noise adds like sqrt/total noise = LNA noise ** + R noise **
I.e. if LNA noise is 600 pV/rtHz and 62 Ω resistor produces 1 nV/rtHZ, correct reading at ARTA or REW is noise density of 1.17 nv/rtHz.
By the same math method, we can extract correct DUT noise level even when measurements are taken around LNA noise floor.
RickRay sent me this picture few days ago. It was a measurement with a shorted LNA input. Do you think this could mean that his noise density could be around 2nV/sqrtHz?
LTSpice sim shows around this (375pV) value, and for me shows around 440pV/sqrtHz.
I think member Calvin mentioned the circuit "should" have around 0.4nV/sqrtHz, here:
Simple 60dB discrete low noise amplifier (lna)
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I responded to Calvin's post and repeat here -- the input impedance of the estimable DSelf MC amplifier is set by R1, or 100 Ohms. If you eliminate R1 the input impedance is approximately R2||R3. C1 should be the lowest value you can get away with, or eliminated.
Will have to breadboard it
I removed the 100R as it would have blown at first measurements of a higher Vout supply.
Also I see member cwtim01 here:
My version of the G = 1000 low noise measurement amp (for Ikoflexer).
Has used the method that I used and also RickRay, and Mr. Wurcer doesn't seem to be having an issue with it.
How come in this particular case RickRay's measurement doesn't apply?
Also I see member cwtim01 here:
My version of the G = 1000 low noise measurement amp (for Ikoflexer).
Has used the method that I used and also RickRay, and Mr. Wurcer doesn't seem to be having an issue with it.
How come in this particular case RickRay's measurement doesn't apply?
The last graph with potentiometer across the input was a little low. So I went back and played with it until I got what i feel is a good average, just a little high to safe. The resistor value for this graph was 8.855ohms or 378.6nV/sqrtHz. Pretty sure this thing is right at 375pV.
Potentiometer across input lead
Potentiometer across input lead
Why shouldn’t I do that? See, you got even better measurement.
It is not a pi***ng contest as some here see it (not you). Nobody is attacking your LNA honesty.
What we are interested in are numbers gotten by proper procedure, so various measurement can be reliably compared for the benefit of all members.
It looks that you have exceptionally exceptional LNA achieving 330 pV/rtHz with only 3 x ZTX transistor. Others need 4 transistors or 8 JFETs to get 475 pV.
There is one odd thing on the attached screenshots: total noise voltage over bandwidth is the same for both measurements, about 1.61 - 1.63 uV, although noise levels are 3 dB different.
When I was doing the same +3 dB test on my LNA, voltage level has risen by corresponding +3 dB.
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The only thing that could be causing that is bandwidth. I think mine is set at 192k for sample rate and 32K for FTT length. We really shouldn't be sharing measurements without the Spectrum Analyzer settings. That's probably why I couldn't get the total number to work for me.
What is your Analyzer set at?
What is your Analyzer set at?
I needed 4x 2N4403 transistors to get to 475pV. He's using the lower noise ZTX951. Also playing with LTSpice sim there doesn't seem to be any advantage from adding a 4th ZTX951.
This is no contest, I'm just removing FUD on the subject of this particular LNA.
edit: also in my case with 2N4403 it seems that the LTSpice sim shows a lower noise value with the stock 2N4403 model. Seems that using the Cordell model for 2N4403 shows a value closer to what I got.
Since the 2N4403 is a stock model in LTSpice, I suppose it's not so accurate? Or else why would the Cordell model exist for it?
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These are rather strange measurements. First of all the noise dip at 11kHz. But most importantly the total noise from 22hz to 22kHz is 271nV. That is a lot more than 6.84 ohms in that bandwidth (50nV) and more than 3 times what my LNA measures (shown here, 86.7nV). The mains related low frequency hash does not explain all of this so what might be the cause for this total noise?
My guess is that there is actually a lot more hash which the lengthy averaging hides. Could you repeat the "input shorted" measurement with Tombo56's settings (see next post).
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I use those settings ATM, with 192 kHz sampling rate.
But, REW takes in the account any settings and calculates right values, at least according to my tests.
See here:
https://www.diyaudio.com/forums/equ...-audio-vol-3-spare-boards-29.html#post6431849
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I agree, I think this setup has considerable noise at higher frequencies. But I should still be able to use the area between 400Hz and 3kHz for measurements. Just can't rely on it for higher frequency measurements.
I'm not sure, but I'm betting if I went to battery power, I could clean up the higher frequency noise.
Problem is it ate 4 9-volt batteries in about 8 hours, can't afford that many 9-volt batteries. Need to look for another bigger battery source.
IME noise measurements in the frequencies below 400hz (maybe 10hz-200hz) are very important regarding power supplies. That is where the layout or decoupling issues will be most apparent.
ZTX851 and friends should get 220pV/rt Hz for _one_ according to H&H's
Art Of Electronics. I got 70 pV from 16 pcs. (single sided version of their balanced
ribbon microphone amplifier at the expense of a large input cap.) That is
exactly like promised in AOE3. The downside is that it makes only sense
for a very low generator impedance. (see pic)
My FET amplifier delivers 330 pV/rt Hz for 16 * ON Semi CPH3910 @ 45 mA total.
Simulation says 200 pV but I cannot get better than 330 pV. 11 dB short to 60R.
I don't want to chase further the lost pV. I'll use cross correlation instead.
I want to get low enough that I don't have to separate noise contributions
on a daily base for common DUTs.
On Semi MCH3914-7 seems to be slightly worse.
These FETs oscillate happily at 600 MHz because the interconnect for
16 of them makes a pretty undefined resonator. I ended up with a
quite large 0603 cap at each drain.
Note that spurs i.e. discrete carriers scale differently than noise when
you change FFT size. I tried to auto-compensate that in my control
program for the FFT analyzer but have yet to find a good algorithm to
recognize them.
Gerhard
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