Same phase counterbalance
One cannot escape the fact that each arm of each quasi LTP has a collector load so the number of inversion stages in these is an even number.
There is significant element of cancellation within the present circuit due to identical phase inputs which is easy to demonstrate in the simulation by cutting the input signal to the secondary Q-LTP or grounding the input. The result from either is a jump in the distortion/output voltage.
The inverting signal to the secondary - QLTP output set is then in phase with the main feedback signal line albeit following a separate path. These together then have to balance against the forward QLTP inverting stage set.
On the evidence of earlier simulations that does not end with an even result so using direct connection of opposite phase input is impractical.
One could use IC op.amps to buffer balanced lines and invert the phase of one of the feed lines to the circuit.
A suggestion along these lines was made earlier in this thread but not taken up due to a preference for a discrete component approach. This is to ignore the progress in IC op.amp developments since 1970.
It may seem a noble cause to go to a lot of trouble to invert the main input, but with that approach it is pertinent to consider the impact of the matching of this with the unmodified with secondary input.
If the latter has to be changed to match with the input we will back to the point where we find ourselves now in terms of circuit complexity with similar results.
Perhaps that is more a discussion along the lines of design technique rather than reasons for oscillation etc and that could continue on a new thread.
One cannot escape the fact that each arm of each quasi LTP has a collector load so the number of inversion stages in these is an even number.
There is significant element of cancellation within the present circuit due to identical phase inputs which is easy to demonstrate in the simulation by cutting the input signal to the secondary Q-LTP or grounding the input. The result from either is a jump in the distortion/output voltage.
The inverting signal to the secondary - QLTP output set is then in phase with the main feedback signal line albeit following a separate path. These together then have to balance against the forward QLTP inverting stage set.
On the evidence of earlier simulations that does not end with an even result so using direct connection of opposite phase input is impractical.
One could use IC op.amps to buffer balanced lines and invert the phase of one of the feed lines to the circuit.
A suggestion along these lines was made earlier in this thread but not taken up due to a preference for a discrete component approach. This is to ignore the progress in IC op.amp developments since 1970.
It may seem a noble cause to go to a lot of trouble to invert the main input, but with that approach it is pertinent to consider the impact of the matching of this with the unmodified with secondary input.
If the latter has to be changed to match with the input we will back to the point where we find ourselves now in terms of circuit complexity with similar results.
Perhaps that is more a discussion along the lines of design technique rather than reasons for oscillation etc and that could continue on a new thread.
Last edited:
We can try it. Could you show the complete input stage?
Thanks.
Sorry, but I don't like the sound from ICs, it's not alive like from discrete components which also are much more reliable.
This was the point where the discussion was started and now is where the traces lead.
Last edited:
If there was ever a question of reliability of discrete components your assertion will be put to the test when you build a circuit as complex as this one is.
IC op.amps are used extensively in recording consoles and replay equipment including CD players. Why do you think that is?
I don't want to discuss reliability here, but everyone can compare the equipment made 40-50 years ago and in current era, how long they live. If possible I would avoid using ICs by all means.
Obviously IC development progress aim is to reduce the overal cost and size of eqipment, but not to improve quality, reliability.
Ian, I tried to sim your input stage with 20K or more sine and it shows huge distortion as well.
Obviously IC development progress aim is to reduce the overal cost and size of eqipment, but not to improve quality, reliability.
Ian, I tried to sim your input stage with 20K or more sine and it shows huge distortion as well.
Last edited:
Getting back to oscillation, would anyone care to comment on this commercial design? It's an Audiolab 8200P schematic, although the 'patient' is the 8000P, virtually identical in every way.
It came in with Q213 shorted base emitter. Not a single defective component apart from this...or so I thought. Anyway, it oscillates badly on both channels, the repaired side being much worse.
Interestingly, the oscillation would stop when the load was connected (when the speaker relay latches). I don't recall exactly the frequency, but on the 2uS timebase setting, about the upper limit of my 20MHz scope if you want to count individual waveforms.
I eventually found C215 in the Zobel network completely open circuit. With absolutely no sign of damage to R249 (or the capacitor for that matter). Replacing the capacitor got rid of the oscillation...sort of. I strongly suspect its just been shifted up out of the range I can see.
So I checked the same device on the other channel. This cap was not o/c, measuring about 98n, but it had ESR of 26 ohms. There are 4 of these caps per channel. The others all have 0.45 - 0.55 ohm (ESR).
Can it be this amp is inherrently unstable? It's not a question of the load.
It came in with Q213 shorted base emitter. Not a single defective component apart from this...or so I thought. Anyway, it oscillates badly on both channels, the repaired side being much worse.
Interestingly, the oscillation would stop when the load was connected (when the speaker relay latches). I don't recall exactly the frequency, but on the 2uS timebase setting, about the upper limit of my 20MHz scope if you want to count individual waveforms.
I eventually found C215 in the Zobel network completely open circuit. With absolutely no sign of damage to R249 (or the capacitor for that matter). Replacing the capacitor got rid of the oscillation...sort of. I strongly suspect its just been shifted up out of the range I can see.
So I checked the same device on the other channel. This cap was not o/c, measuring about 98n, but it had ESR of 26 ohms. There are 4 of these caps per channel. The others all have 0.45 - 0.55 ohm (ESR).
Can it be this amp is inherrently unstable? It's not a question of the load.
Unlikely if many have been made or they would all be returned for fixing which would be a disaster.
Electrolytics tend to go bad with age.
I would look at those first.
I have to say that in 40 years in electronics I have never seen a capacitor go open circuit. Maybe a broken lead to the capacitor but never o/c.
Capacitors can go leaky and let DC through but I have mostly only seen that in valve amps.
As it happens, I subsequently got another one (8000P) in, this time with one channel completely destroyed from the bias transistors forward. And I don't think it was the owners fault either.
I've noticed Q213/214 get incredibly hot, as do R232,236 & R231,235. Hot enough to darken the PCB, which to me is not a good sign. Both amps are the same - 2 different owners.
Well, you have the edge on me in years, but in 30 odd years, I have seen a few o/c (non electrolytic) caps, but very few and far between. A lot of the gear I get is used in installations with very long cable runs - 20 to 40 meters. This seems to be hard on the Zobel networks, but usually there is physical damage to the cap and resistor.
With reguard to the electrolytics, I changed those before I even powered the unit up (not the big storage ones). Most were completely dry.
I've noticed Q213/214 get incredibly hot, as do R232,236 & R231,235. Hot enough to darken the PCB, which to me is not a good sign. Both amps are the same - 2 different owners.
Well, you have the edge on me in years, but in 30 odd years, I have seen a few o/c (non electrolytic) caps, but very few and far between. A lot of the gear I get is used in installations with very long cable runs - 20 to 40 meters. This seems to be hard on the Zobel networks, but usually there is physical damage to the cap and resistor.
With reguard to the electrolytics, I changed those before I even powered the unit up (not the big storage ones). Most were completely dry.
Simulation Mea Culpa
The simulation attached to my post 426 contains an error - my thanks to Ian Hegglun for pointing this out.
This concerns the orientation of the CCS transistors Q6-Q9 which are shown the wrong way. This arose from my picking an older simulation to save redrafting a complete circuit that contained this error - Sorry about that.
This required changes to the values of R8, R9 and R41 in the attached revised version. Also I had afterthoughts about omitting 2R2 stopper resistors in the bases of the driver stage transistors after re-reading a post by Bob Cordell earlier in this thread.
The simulation is the Bode stability one. In the process of changing the values of R8 and R9 I noticed changes in the phase plot. So if anyone wants to modify the circuit such as changing V1 and V2 this plot needs keeping an eye on.
The simulation attached to my post 426 contains an error - my thanks to Ian Hegglun for pointing this out.
This concerns the orientation of the CCS transistors Q6-Q9 which are shown the wrong way. This arose from my picking an older simulation to save redrafting a complete circuit that contained this error - Sorry about that.
This required changes to the values of R8, R9 and R41 in the attached revised version. Also I had afterthoughts about omitting 2R2 stopper resistors in the bases of the driver stage transistors after re-reading a post by Bob Cordell earlier in this thread.
The simulation is the Bode stability one. In the process of changing the values of R8 and R9 I noticed changes in the phase plot. So if anyone wants to modify the circuit such as changing V1 and V2 this plot needs keeping an eye on.
Stability
The last posted Spice circuit indicates marginal stability. If the Zobel network is removed, it shows up when the Spice is run. The circuit needs to be stable without and with the Zobel network. You should also be able to add a capacitive load in parallel with a 8R resistive one, without the design becoming unstable (no Zobel). The value of capacitor that the design will tolerate, indicates level of stability. Compare designs from others. Higher gain designs will be less tolerant of capacitive loads after feedback is applied.
It appears that the target bandwidth may be too high for the topology. You should be able to easily adjust the bandwidth. If the circuit does not allow you to control the bandwidth, while maintaining negative phase, then compensation schemes won't work. About-to-oscillate conditions affect distortion. Therefore bandwidth control has to be built into the design, not as a suck and see mechanism.
In general, especially with LTspice you should prevent the phase going positive. Reversal of phase direction during bandwidth roll off should also be minimal. Therefore validate with AC analysis before running the Transient one.
Also be aware of stability and distortion predictions. The models are not accurate and act only as a guide. Circuits which seemingly have minimal distortion can be crap in the real world.
The last posted Spice circuit indicates marginal stability. If the Zobel network is removed, it shows up when the Spice is run. The circuit needs to be stable without and with the Zobel network. You should also be able to add a capacitive load in parallel with a 8R resistive one, without the design becoming unstable (no Zobel). The value of capacitor that the design will tolerate, indicates level of stability. Compare designs from others. Higher gain designs will be less tolerant of capacitive loads after feedback is applied.
It appears that the target bandwidth may be too high for the topology. You should be able to easily adjust the bandwidth. If the circuit does not allow you to control the bandwidth, while maintaining negative phase, then compensation schemes won't work. About-to-oscillate conditions affect distortion. Therefore bandwidth control has to be built into the design, not as a suck and see mechanism.
In general, especially with LTspice you should prevent the phase going positive. Reversal of phase direction during bandwidth roll off should also be minimal. Therefore validate with AC analysis before running the Transient one.
Also be aware of stability and distortion predictions. The models are not accurate and act only as a guide. Circuits which seemingly have minimal distortion can be crap in the real world.
Last edited:
Mjona, why do we need buffer with negative input parts if the schematic is SE? Than we can omit them.
Balanced?
The design has balanced inputs. You can see the positive and negative signs next to the inputs in the original design. You have to ground the negative input to make it SE. You can use it this way with SE sources. But if you want to use SE sources and drive the balanced configuration you will need an inverting buffer. The one shown in the LTspice schematic does not invert.
You could try reducing R6 and R7 to 210R and also make C3 base/collector for Q16 with an increase to 82pF/100pF. Similarly C35 for Q17. IE reconnect these caps as Keantoken suggested. The simulator says this is stable with and without Zobel. Take R6 and R7 down further if necessary.
The design has balanced inputs. You can see the positive and negative signs next to the inputs in the original design. You have to ground the negative input to make it SE. You can use it this way with SE sources. But if you want to use SE sources and drive the balanced configuration you will need an inverting buffer. The one shown in the LTspice schematic does not invert.
You could try reducing R6 and R7 to 210R and also make C3 base/collector for Q16 with an increase to 82pF/100pF. Similarly C35 for Q17. IE reconnect these caps as Keantoken suggested. The simulator says this is stable with and without Zobel. Take R6 and R7 down further if necessary.
What is the reason to use SE sources and drive the balanced configuration? In this case we can ground negative input or delete negative input parts from the schematic.
The schematic is not working if to drive differential source to both inputs, btw.
The schematic is not working if to drive differential source to both inputs, btw.
As Mjona suggested, the negative input must fed via a cap, grounded or not. Tied directly to ground, will create DC offset on output.
In the circuit Mjona last submitted, differential drive seems to work. I don't know if we are talking about the same circuit.
You cannot delete the negative input parts. Having a differential input is for flexibility as DACs and pro equipment can be balanced.
In the circuit Mjona last submitted, differential drive seems to work. I don't know if we are talking about the same circuit.
You cannot delete the negative input parts. Having a differential input is for flexibility as DACs and pro equipment can be balanced.
Last edited:
I was not referring to circuits in 422, or 435. Just the last schematic that Mjona posted. I can't speak for the distortion performance, only that the negative input of that design seems to amplify.
Additionally C23 and C26 are trying to boost AC gain at high frequency. This is to artificially extend the bandwidth. As C23 and C26 are electrolytics probably, you should know that these are now in the signal path and reducing the phase margin of the amp slightly. Since the design is marginally stable you need as much margin as you can get. Delete them. The amp has enough bandwidth.
The phase shift at 0dB in the AC plot ideally should be less than 300 degrees and not bounce wildy. You don't know how much bounce there is when you build it.
The phase shift at 0dB in the AC plot ideally should be less than 300 degrees and not bounce wildy. You don't know how much bounce there is when you build it.
The difference with this file and Mjona's is signal source and input buffer. I showed it to proove the Mjona's schematic won't work with differential input drive.
In fact these caps have to be 1mF electrolytics, but they aren't changing the behaviour of the amp in the sim. Why are they in signal path? They are decoupling capacitors on supply lines.
How much AC plot has the phase shift margin now? How do you see it in the plot? I already built it before (without latest Mjona's improvments), but it's not working in SE, too much oscillation at the scope with input signal applied.
In fact these caps have to be 1mF electrolytics, but they aren't changing the behaviour of the amp in the sim. Why are they in signal path? They are decoupling capacitors on supply lines.
How much AC plot has the phase shift margin now? How do you see it in the plot? I already built it before (without latest Mjona's improvments), but it's not working in SE, too much oscillation at the scope with input signal applied.