Re: Back of the envelope algebra
For matched beta I3 = I4.
(Vout - Vin) of the output stage to the first order has nothing to with beta. Any explanation of this circuit that uses beta is wrong.
I can't state it more clearly.
traderbam there is nothing wrong with your equations.
traderbam said:
For matched beta I3 = I4.
(Vout - Vin) of the output stage to the first order has nothing to with beta. Any explanation of this circuit that uses beta is wrong.
I can't state it more clearly.
traderbam there is nothing wrong with your equations.
Jkeny,
That's right.
I should mention I made a simplification in my calculation that b1 >>1 and B2 >>1. Otherwise, the equation should be:
i4 = I - (b2 + 1)/(b1+1).(I - i3)
Brian
That's right.
I should mention I made a simplification in my calculation that b1 >>1 and B2 >>1. Otherwise, the equation should be:
i4 = I - (b2 + 1)/(b1+1).(I - i3)
Brian
Re: Re: Back of the envelope algebra
The large signal beta varies with Vce (Early effect) and this becomes exaggerated and highly non-linear in the saturation region. The ratio of b1 to b2 changes with (Vout - Vin). The saturated transistors look like non-linear resistors between the input transistors and the drivers.
scott wurcer said:
The large signal beta varies with Vce (Early effect) and this becomes exaggerated and highly non-linear in the saturation region. The ratio of b1 to b2 changes with (Vout - Vin). The saturated transistors look like non-linear resistors between the input transistors and the drivers.
Thank you Hugh Dean... a very nice helping hand
Clear explanation.... educated conversation..civilized behavior.
nice that.
thanks,
Carlos
Clear explanation.... educated conversation..civilized behavior.
nice that.
thanks,
Carlos
Yes Carlos,
Isn't it heart warming to see the thread finally start to produce some investigative efforts!
Well done Hugh & Steve (in the background) & others
Edit: I should mention OS also who has gone further than anybody else in teasing out the operation & component dependencies of the circuit.
Isn't it heart warming to see the thread finally start to produce some investigative efforts!
Well done Hugh & Steve (in the background) & others
Edit: I should mention OS also who has gone further than anybody else in teasing out the operation & component dependencies of the circuit.
Re: Thank you Hugh Dean... a very nice helping hand
Bravo! Bravo! Can we get any credit for attending this class? This is as good as it gets and shows what can be done by good people with high standards and ethics and a desire for contributing in a positive manner. Civil discussion - point and counterpoint - excellent.
destroyer X said:
Bravo! Bravo! Can we get any credit for attending this class? This is as good as it gets and shows what can be done by good people with high standards and ethics and a desire for contributing in a positive manner. Civil discussion - point and counterpoint - excellent.
G.Kleinschmidt said:
And the "non-switching" crowd are still ignoring that 1uF capacitor.
It is not just the cap that ties the driver base voltages together, it is also the bias diodes and bias transistors. Saturated or not, the be junction is a diode.
AndrewT said:
Right you are Andrew! DC servo gets its input on inverting opamp's input and reverses the polarity of corrective signal.
Steve's output stage is non-inverting - I should be more carefull
Krill amplifier
Hi folks
Would it be possible to have the layout of this amplifier?
I would like to build it after so many good things heard on this thread
about the Krill.
Thanks
Hi folks
Would it be possible to have the layout of this amplifier?
I would like to build it after so many good things heard on this thread
about the Krill.
Thanks
Re: Re: Re: Back of the envelope algebra
That would require the beta vs Vce in saturation to be directly related to Vbe vs Ic on a very different device. And the action would have to "jump" through zero to saturate one side or the other unless both are saturated at the same time. Saturation effects don't track the same with temp either.
traderbam said:
That would require the beta vs Vce in saturation to be directly related to Vbe vs Ic on a very different device. And the action would have to "jump" through zero to saturate one side or the other unless both are saturated at the same time. Saturation effects don't track the same with temp either.
Re: Re: Re: Re: Back of the envelope algebra
Yes. Both bias transistors need to be operating in their saturation regions to avoid a sort of dead-band. This is the case in SD's circuit as his bias chain comprises 5 junctions in series and the input buffers comprise 2, so the bias transistor Vces share 3 junctions of voltage between them...about 0.9V each.
I agree with your concern about tracking.
scott wurcer said:
Yes. Both bias transistors need to be operating in their saturation regions to avoid a sort of dead-band. This is the case in SD's circuit as his bias chain comprises 5 junctions in series and the input buffers comprise 2, so the bias transistor Vces share 3 junctions of voltage between them...about 0.9V each.
I agree with your concern about tracking.
Re: Re: Re: Re: Re: Back of the envelope algebra
Still one of the devices on the first schematic is not very saturated by the voltages shown. If this is really doing anything I can see how people are having a hard time repeating results. Maybe I'll try some MEXTRAM models.
traderbam said:
Still one of the devices on the first schematic is not very saturated by the voltages shown. If this is really doing anything I can see how people are having a hard time repeating results. Maybe I'll try some MEXTRAM models.
I don't know, I heard Steve was selling boards... So , I don't
know if posting a board would be acceptable.
I am doing my triple EF , a krill variant ,AND a standalone
Krill output stage. The thermal considerations are "stumping me"
on one hand I see carlo's board with no heatsinking , but
my fingers tell me
the CCS /Vbias need SOMETHING!😕
I'm not sure what VAS I will use on the "full up" Krill.
OS
Attachments
ostripper said:
I don't know, I heard Steve was selling boards... So , I don't
know if posting a board would be acceptable.
I am doing my triple EF , a krill variant ,AND a standalone
Krill output stage. The thermal considerations are "stumping me"
on one hand I see carlo's board with no heatsinking , but
my fingers tell me
😕
I'm not sure what VAS I will use on the "full up" Krill.
OS
The latest photo that Carlos shows (post #1096) is the PWB's that Steve is selling and that he had me send to Carlos for his evaluation. The photo does not show the final driver transistors hooked up or mounted to the heat sink - which is where the thermal tracking diodes are mounted.
😉
No I don't think posting the board would be just - Steve has given us this schema & he has boards (which was not the reason he started the thread) so I think in all fairness his IP should be protected - give the man something back for his generosity shown here!
Good on Ya, OS - three variants - should be interesting
No Heatsinking on DX board - I wonder is this the root of his big offset problem on his old board?
Edit: cross posts with Thomas
Good on Ya, OS - three variants - should be interesting
No Heatsinking on DX board - I wonder is this the root of his big offset problem on his old board?
Edit: cross posts with Thomas
Re: Re: Re: Re: Re: Re: Back of the envelope algebra
Do you mean the schematic in post #2?
Here it looks to me like:
Q8 (2SA1306B) has Vce = 660mV
Q11 (2SC3298B) has Vce = 196mV
and both have an Ic about 9 or 10mA
It's hard to see what is going on from the data sheets right down in the left corner of the "on region characteristics".
scott wurcer said:
Do you mean the schematic in post #2?
Here it looks to me like:
Q8 (2SA1306B) has Vce = 660mV
Q11 (2SC3298B) has Vce = 196mV
and both have an Ic about 9 or 10mA
It's hard to see what is going on from the data sheets right down in the left corner of the "on region characteristics".
Re: Re: Re: Re: Re: Re: Back of the envelope algebra
Nothing interesting. The current in the diode string just goes out the collector of the very saturated device. Talking from top to bottom via yet another beta reduction into the diode string does not do much.
I suppose just building the biaser would tell what the saturation behavior really is.
scott wurcer said:
Nothing interesting. The current in the diode string just goes out the collector of the very saturated device. Talking from top to bottom via yet another beta reduction into the diode string does not do much.
I suppose just building the biaser would tell what the saturation behavior really is.
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