Hello stigigemla, Where is the schematic are you referencing in post #56, so I can see the proper part designators ?
Thanks, David
Thanks, David
I start LTspice with DG changes...the CCS i keep. i do not know if this have an influence.
DCoffset is -116µV
CCs current 2,18mA Q1
LTP - each have acurrent of 1,08mA
current aat VAS Q4 8,17mA
current Q5 is 10mA
output transistors - bias is 90mA each
thd -sim
THD 4R at max power 1Vp input = 0,171%...17,66WATT
THD 8R at max power 1Vp input = 0,366%...35WATT
THD 4R at 0,5Vp input = 0,0587%...9,37WATT
THD 8R at 0,5Vp input = 0,1537%...4,8WATT
THD 4R at 0,25Vp input = 0,094%...2,33WATT
THD 8R at 0,25Vp input = 0,056%.....1,2WATT
compared to post 31 worse.
slew rate and oscillation check is the next step
DCoffset is -116µV
CCs current 2,18mA Q1
LTP - each have acurrent of 1,08mA
current aat VAS Q4 8,17mA
current Q5 is 10mA
output transistors - bias is 90mA each
thd -sim
THD 4R at max power 1Vp input = 0,171%...17,66WATT
THD 8R at max power 1Vp input = 0,366%...35WATT
THD 4R at 0,5Vp input = 0,0587%...9,37WATT
THD 8R at 0,5Vp input = 0,1537%...4,8WATT
THD 4R at 0,25Vp input = 0,094%...2,33WATT
THD 8R at 0,25Vp input = 0,056%.....1,2WATT
compared to post 31 worse.
slew rate and oscillation check is the next step
Check the current in Q2 and Q3 (should be near the same). R3 is wrong calculated.
If You test the Bode plot you will see amplitud and phaze for all frequencies.
The phaze out should be under +-90degrees for all frequencies where gain is larger an 0dB.
That phaze margin makes it shure you eill have no oscillations.
If You test the Bode plot you will see amplitud and phaze for all frequencies.
The phaze out should be under +-90degrees for all frequencies where gain is larger an 0dB.
That phaze margin makes it shure you eill have no oscillations.
R3 is calculated to achive the target by WD CCS 2,14mA.
mine is 2,18mA
what is wrong?
both current of Q2,Q3 are neraly the same 1,08ma..1,09mA
R6 is different because WD uses 22Volt rail and i set the DC offset as good to zero as i can.-->-160µV
sorry i cant do this...LTSpice is new for me...
i know its needed but without knowledge...
In the schematic in post #63 R3 is 13 ohms. I guess you have another value.
If you reduce the values of R4 and R5 the distortion will be lower.
Theoretically with 0 ohm it will be near 10 times lower. But i would reduce them step by step and check for self oscillations and ringing in square wave.
If you reduce the values of R4 and R5 the distortion will be lower.
Theoretically with 0 ohm it will be near 10 times lower. But i would reduce them step by step and check for self oscillations and ringing in square wave.
is there a reason because both of you do not think about a zobel network at the output? is that amp so slow that its not needed?
If I may - I think there must be something wrong somehwere in this amp that makes it so slow.
These SlewRate numbers are not normal/expected even for such simple amp...
The value itself, e.g. 2V/us is not a problem for a 10W amp, it's acceptable, but it SHOULD be higher.
There is no point in investing time and money in building amp with 2V/us slew rate 🙂
I didn't look at the sim yet, but I suspect some problem that's throttling slew rate...
These SlewRate numbers are not normal/expected even for such simple amp...
The value itself, e.g. 2V/us is not a problem for a 10W amp, it's acceptable, but it SHOULD be higher.
There is no point in investing time and money in building amp with 2V/us slew rate 🙂
I didn't look at the sim yet, but I suspect some problem that's throttling slew rate...