[ (kt/q) / CurrentSourceValue ] turns out to be 4.33 ohms in this case. When you push 6.0mA through 4.33 ohms, you get 1 * (kT/q) across the degeneration resistor. I have chosen to parameterize it this way because, at any and every collector current, the voltage dropped across the intrinsic emitter resistance re (=1/gm), is always (kT/q). Just from the definition of gm.
So there's 1*(kT/q) dropped across the intrinsic emitter resistance, and there's (a designer's choice)*(kT/q) of voltage dropped across the external "degeneration" resistance. How many (kT/q) of voltage are dropped across the degeneration resistance? It's some integer times (kT/q) volts.
What I find delightful is that the BC847 current source's output impedance increases by a factor of 10X, when you drop only 10.8 (Kt/q)'s across the emitter resistance. That's only 10.8 * 0.026 = 0.281 volts. Give up 281 millivolts of current source compliance, gain a factor of ten in output impedance. Yes please!!
So there's 1*(kT/q) dropped across the intrinsic emitter resistance, and there's (a designer's choice)*(kT/q) of voltage dropped across the external "degeneration" resistance. How many (kT/q) of voltage are dropped across the degeneration resistance? It's some integer times (kT/q) volts.
What I find delightful is that the BC847 current source's output impedance increases by a factor of 10X, when you drop only 10.8 (Kt/q)'s across the emitter resistance. That's only 10.8 * 0.026 = 0.281 volts. Give up 281 millivolts of current source compliance, gain a factor of ten in output impedance. Yes please!!
I did it in 12 minutes, but then I realized the result will depend on collector voltage and base drive impedance, so I can't match your results without seeing your circuit. However after 21 minutes I did produce this chart which shows the output impedance vs n*4.33 Re at 5, 10, 20 and 40V.
As a rule of thumb, Zout will be roughly VAF/Iq, multiplied by Rm/(Rm+Re) where Rm is the emitter junction dynamic resistance and VAF is the Early voltage. However there will be an upper limit of VAF/Ib, where even if you keep the emitter current constant, the base current swing subtracts from the collector current. This must be improved by base current recirculation or other methods. Zout will increase with collector voltage, so it is usually somewhat higher than these estimates unless Vce is high enough that VAF begins to drop.
As a rule of thumb, Zout will be roughly VAF/Iq, multiplied by Rm/(Rm+Re) where Rm is the emitter junction dynamic resistance and VAF is the Early voltage. However there will be an upper limit of VAF/Ib, where even if you keep the emitter current constant, the base current swing subtracts from the collector current. This must be improved by base current recirculation or other methods. Zout will increase with collector voltage, so it is usually somewhat higher than these estimates unless Vce is high enough that VAF begins to drop.
Well done! Congratulations. It's a shame your X-axis doesn't extend left to zero (kT/q)'s , which requires a tad bit of finesse. Having that on the plot does make it super easy to visually read off the coefficients of the linear equation y = m*x + b which fits the data, since "b" is just Zout @ x=0.
If an upper limit to Zout does exist, then the plotted curve will eventually roll over and become horizontal; its linear zone won't extend forever. I think I recall an early edition of Gray and Meyer mentioning that the maximum possible improvement from emitter degeneration (Zout@Re=Infinity / Zout@Re=Zero) was a factor of Beta. So G&M expect a rollover, becoming horizontal, too.
If an upper limit to Zout does exist, then the plotted curve will eventually roll over and become horizontal; its linear zone won't extend forever. I think I recall an early edition of Gray and Meyer mentioning that the maximum possible improvement from emitter degeneration (Zout@Re=Infinity / Zout@Re=Zero) was a factor of Beta. So G&M expect a rollover, becoming horizontal, too.
Mark, I understand what you and Kean did, but I am struggling to see what it means when designing a stage.
I may have a blind spot here. For me it's a bit like showing that doubling the voltage across a resistor doubles the current through it.
So? I know I'm not doing your work enough justice here, but I really don't see the value.
Jan
I may have a blind spot here. For me it's a bit like showing that doubling the voltage across a resistor doubles the current through it.
So? I know I'm not doing your work enough justice here, but I really don't see the value.
Jan
I understand it that way that collector impedance can be increased by emitter-degenartion resistors proportional to voltage drop acrross these in units of (Kt/q)'s.
I find it useful to remember "Zout improves by 10X, when you drop eleven (kT/q)'s across the degeneration resistor". What is the cost? (11 * kT/q of lost headroom) and what is the benefit? (10X greater Zout).
That's beneficial knowledge IMHO, when considering other alternatives like cascode CCS, 2T feedback CCS, etc.
If nobody else feels it's worth memorizing this little fact, I'm still happy. It's still handy, to me.
That's beneficial knowledge IMHO, when considering other alternatives like cascode CCS, 2T feedback CCS, etc.
If nobody else feels it's worth memorizing this little fact, I'm still happy. It's still handy, to me.
If you use steps of 1V, or 400mV, or 123.456mV, you get the same curve.
It's the slope of that curve that gives you the factor of 10.
And 11* kT/q gives you a 10x point on the curve but what is the significance?
It's an interesting 'coincidental' thing perhaps, no more than that?
Nice to remember.
Jan
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It's the slope of that curve that gives you the factor of 10.
And 11* kT/q gives you a 10x point on the curve but what is the significance?
It's an interesting 'coincidental' thing perhaps, no more than that?
Nice to remember.
Jan
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I started that but somehow it petered out. I need to rejuvenate it.
https://www.diyaudio.com/community/threads/myths-tricks-and-hey-thats-neat.406418/
Jan
https://www.diyaudio.com/community/threads/myths-tricks-and-hey-thats-neat.406418/
Jan
If a pure CCS is what you actually need, then this can help to not need more transistors than necessary. It's not necessarily useful when designing a VAS however, because the base drive current is the same given the same collector current and voltage swing, and it is the LTP output current that will determine the error voltage that remains at the feedback network and the output of the amplifier. There are many designs using a "high impedance" VAS which don't actually benefit because it does not change the LTP current waveform.
20dB of negative feedback improves the output impedance of the current source by 20dB.
BTW if you have enough voltage headroom, you can replace the resistor with a current source for a dramatic increase in output impedance across frequencies, for example:
(From: Walt Jung, “Sources 101: Audio Current Regulator Tests for High Performance, Part 1”, audioXpress, April 2007.)
You can view this a a cascoded JFET CCS, but also as a BJT CCS with a very, very large emitter resistor.
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"20dB of negative feedback improves the output impedance of the current source by 20dB."
Yes. We all know that. What does that have to do with 11*kT/q?
Jan
Yes. We all know that. What does that have to do with 11*kT/q?
Jan
One way to look at it is that adding an extra emitter resistance Re to a BJT CCS adds extra feedback to that CCS. Increasing (Re+re) adds more feedback and increases Zout. Increasing (Re+re) ten times increases Zout approx. ten times.
Hi,
I'm having trouble with a PMOS Spice model downloaded from Vishay (attached). There are 2 lib files in the zip, I've used the first one si7119dn_ps.lib.
My Inverting Converter model downloaded from Analog Devices works fine with the original 30V MOSFET but when I add the Vishay device, the model runs but gives totally different results.
Can anyone tell me what I need to do to the 7119DN Spice model please?
Thanks, Dave.
I'm having trouble with a PMOS Spice model downloaded from Vishay (attached). There are 2 lib files in the zip, I've used the first one si7119dn_ps.lib.
My Inverting Converter model downloaded from Analog Devices works fine with the original 30V MOSFET but when I add the Vishay device, the model runs but gives totally different results.
Can anyone tell me what I need to do to the 7119DN Spice model please?
Thanks, Dave.
Did you check that both models have the same pinout?
Sometimes different models have different pin orders and then it has the effect that the device is connected wrong.
The 1st line in the model file generally shows the pin order.
Jan
Sometimes different models have different pin orders and then it has the effect that the device is connected wrong.
The 1st line in the model file generally shows the pin order.
Jan
Thanks Jan. Great suggestion but this line from the .lib file seems correct
.SUBCKT Si7119DN D G S
This corresponds with the symbol D - 1, G - 2 and S - 3.
I might stick with the 7113DN model which is included.
.SUBCKT Si7119DN D G S
This corresponds with the symbol D - 1, G - 2 and S - 3.
I might stick with the 7113DN model which is included.
Yes. Was worth a check ...
Maybe you should put that FET in a little test circuit, varying Vgs and see what it does, to verify the model is kosher, before plugging it onto your circuit.
Jan
Maybe you should put that FET in a little test circuit, varying Vgs and see what it does, to verify the model is kosher, before plugging it onto your circuit.
Jan
You could use the LTspice VDMOS library SI7113DN model with an area scale factor of 0.2 as an equivalent approximation for the SI7119DN.
I found a VDMOS SI7113DN m=0.2 model doesn't give the anomolous 20A 1ns drain current spikes that the subcircuit gives (shown below):
And with the VDMOS SI7113DN m=0.2 below:
Notice no anomolous positive spikes.
Ideally, fit a VDMOS to the SI7119DN datasheet.
I found a VDMOS SI7113DN m=0.2 model doesn't give the anomolous 20A 1ns drain current spikes that the subcircuit gives (shown below):
And with the VDMOS SI7113DN m=0.2 below:
Notice no anomolous positive spikes.
Ideally, fit a VDMOS to the SI7119DN datasheet.
Thanks very much! Running your 2 models now. A question
I searched for "area scale factor". All I came up with was "It affects the body diode capacitance variation with voltage, and changes the diode from a normal one to a hyperabrupt one." Is that correct?
All the simulations take 100ms or so to get down to the required -150V. They take about 60ms to get to -75V and then another 40ms to get to -150V. On my PC they take a long time to complete that. I'll have to see if v24 is any faster.
BTW, the load resistor wasn't connected in either of your simulations.
I searched for "area scale factor". All I came up with was "It affects the body diode capacitance variation with voltage, and changes the diode from a normal one to a hyperabrupt one." Is that correct?
All the simulations take 100ms or so to get down to the required -150V. They take about 60ms to get to -75V and then another 40ms to get to -150V. On my PC they take a long time to complete that. I'll have to see if v24 is any faster.
BTW, the load resistor wasn't connected in either of your simulations.
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