DAC AD1862: Almost THT, I2S input, NOS, R-2R

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What I am going to do, is: start with one psu2, both set to +-5V. Later then switch back to +-5V and +-12V and add a separate+5V for digital part of AD1865 and I will see, if the effort is pays. Cheers
Then you cqn try pure Jfet with op1678... seems a good candidate. However a dual. Will be ok with Vunce adaptator without dil8 wocket , solder caps leads surplus direct on the adaptator.
 
I/V opamps can be powered separately. Don't install J10, J11, J12 and J13. Use these pins for the +-12V PSU:

(+-5V still be needed for the AD1865)
I think there is another cheaper solution

1502904444_ScreenShot2022-06-10at02_21_30.png.ebd86d44ef0ead0fccc2404d76886dbb.png

Screen Shot 2022-06-10 at 02.38.02.jpg

Don't install J1 and J2. Use these pins for the +-5V PSU

Below the connector where it says VA becomes + 12 / -12V

Capacitors C27, C28, C32, C33 change to be 100uF / 16V
 
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For the best sound experience avoid direct I2S output from the rpi. Instead use the rpi USB and connect here a high quality USB-I2S device with clean clock (like jlsounds or another xmos based ... I think even the cheap PCM2706 with rpi USB will sound better as direct I2S from the rpi) ;) ... someone in this thread tried it ...
In the future I can create 40 pins version also for RPI, but it will be the stop-clock :)
great. :D
 
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Recap:
v1. - 1 PSU board (+5, 0, -5 and +12, 0, -12)
v2. - 1 PSU board (+5, 0, -5 and +12, 0, -12) + 1 PSU board (+5, 0)

miro1360 please confirm.
 

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Yes, so you have a jittery and not synchronised souce, and you clean it up with cmplicated software / firmware / hardware.
Is that a good solution ? Are there no better solutions ?
Well implemented USB-I2S bridges have separate clock domains for source and DAC. So I2S timings are generated from the same MCK which DAC uses. If the USB-I2S bridge operates with asynchronous (or adaptive) UAC source jitter should have no impact.
 
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