Thanks for your advice, might be worth the 100 for some play time with a new toy.
Just wondering if I can get back to dominant H2 with the single ended tube with buffer. Shouldn't be too hard I suppose.
Just wondering if I can get back to dominant H2 with the single ended tube with buffer. Shouldn't be too hard I suppose.
IIRC, TDA1541(A) has H3 normally dominant even in SE? Maybe I misremember?
Ideally we want an output stage that has at least 6dB less H3 than the TDA1541 (so the increase in H3 is minimal) and around 6-10dB more H2 than the H3 from TDA1541 to actually reliably mask the H3 content. Of course audibility of this depends on a lot factors.
I always recommend to read "Katz Corner" (I wish that served Pastrami on Rye with Moutarde de Dejon à l'ancienne) with Bob (not the Deli) Katz, noted mastering engineer on adding just a smidgen of H2:
https://www.stereophile.com/content/katzs-corner-episode-25-adventures-distortion
I also recommend in the context to consider "Why HiFi Experts Disagree" by Gordon J. Holt, dated 1963:
Specifically:
I personally like to think of the system that shoots for "better than the real thing" as "Ultra Fidelity" and not "High Fidelity".
Thor
I agree. All the buzzwords "balanced", "push-pull", "symmetrical", "complementary" are actually reducing H3, not affecting H2. If we artifically increase H2 over H3, or suppress H3 against H2, it may become unnatural, "warm" in bad sense.
TDA1541A produces H3 (<0.001% FS) even in unbalanced mode. H2 is about 20 dB below H3 IIRC.
TDA1541A produces H3 (<0.001% FS) even in unbalanced mode. H2 is about 20 dB below H3 IIRC.
Your right. For 13R load its about -115dB for H3 and -118dB for H2 according to mvaudiolabs web site.
At the moment I've got -72dB H2 and -101dB H3 coming out of my tube stage. So should be able to get -78dB H2, that about right?
Just had a listen. Some good points. I would add that a DAC is a musical instrument and every single part and technique used will influence the sound. (and so much more)
Good way of defining it. I'd say that's how id define your older sinc comp filter to sound. (although with different impedances and phase angles using different values)
At the moment im using 150uH with DCR of 40mohms and a 220n epcos and 6r5 in series with 13RIV with measurements:
+1.4dB @ 3.7k
+3.16dB @ 11k
+3.5dB @ 17.7k
+3.5dB @ 20k
I tried much steeper filters but the fast transients became completely detached from the music. And nauseating at times.
I also found that cutting the highs off with about 15.6n gave a rise time of about 700nS at its steepest. I prefer it fast it seems, 33n sounded to slow.
+1 for the Thorsten mention of Katz, of importance of 2H vs 3H. I heard a lot of examples in various levels of HD. Not a tape fanatic, then (note: a perfectly biased tape will have only 3H and odd order H)... although one tape generation is ok (2 maximum, for example, Analogue Productions LP processing); a lot of great old recordings are previous to digital.
I don't bother about so much small variation; one different tube can have more or less 2H, and unless it is excessive, the most important is the 3H below the 2H.
BTW: this DAC used tubes for final switching stage due to theme choice (making mixed signal stages with tubes): this creates a limit of what we can achieve. But I measured a ES9018 DAC using pure voltage mode, and measures very close (0.013%)! (In current mode, is far far less of course).
Then we can trust in it's promising signal processing of this DAC (great effort for the processing section), so I believe that not having too much hidden gremlins under this grass level...
It's concept is taken into extreme refinement and level with the Mola-mola Tambaqui (it have 32 special PWM output sections instead of one tubed).
It's the fun about DIY, we can create something with a theme that attract us... like TDA1541A for various people...
This adds to my collection of DAC's, and in the end, I use each one for a different application/system. Is great when we can have it, so we can listen for itself and take our own conclusions, using our own ears.
One thing I want to do with my TDA1541 DAC is to add a MCLK divider to operate the DEM system synchronous. But it need to be 3V3 logic, just because the oscillator module is 3V3.
Last weekend I'm making a "zen" (hehe) listening with my plasma system ("zen" due to low maximum SPL and the flame itself). I love to use the TDA DAC with it. Airy treble (literally, with flame tweeter...) 😎
He responded just now, about that he remember (he will re-check soon for more precise info): the core is some grade of the FINEMET from Hitachi (thickness = 30µm).
LAST EDIT: 0% nickel, is Fe-based.
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More on the various switching noise path's in the TDA1541
So, after decoding the actual 12pF input capacitance as mainly (~ 9pF) being from the PNP transistor fabrication, I realised that because that base region would have actually become a NPN transistor collector, every NPN transistor has as a result around 9pF collector to substrate, unless it uses a different (smaller/larger) geometry.
So let's re-look at our putative input circuit.
The very crudely drawn in red capacitors are all the collectors of NPN Transistors, Anodes of Diodes (in effect also a variation of a NPN Transistor collector) and the PNP transistor Base capacitance's to Substrate, which in turn is a layer of higher resistance bulk P-doped silicon connected to the -15V line.
We can see that there are at least three and likely six more 9pF parasitic capacitors to substrate.
Interestingly the CM/EC Logic that takes over is balanced and so currents into substrate pretty much net off.
This holds for all the various latches inside TDA1541, noise comes from the Input circuit almost exclusively.
This noise is not ground bounce (we actually don't have that at all, it's not a TTL/CMOS IC) but capacitive coupling of unbalanced switching edges into the substrate and from there straight into the output.
Why?
Let's look at the output. The diode connected transistors that block reverse current flows when the bit is inactive have parasitic capacitance to substrate, as do our cascode transistors.
So, all sorts of currents related to edge-speed couple into the substrate which has a certain resistance to -15V and then into the -15V rail. Any of these needle pulse's that cannot be absorbed, and there is always a residual even with perfect decoupling, coupled back into the output. A conceptual schematic of how this noise couples:
At a guess, Cin is maybe 50pF total capacitance that couples noise into the substrate.
Cout perhaps 150pF total per channel.
Substrate resistance - call it 30 Ohm.
(If anyone has better guesses, do say so)
Thus the HPF to substrate is ~ 106MHz. So -15V RF decoupling matters a lot actually. It will sink a material amount of the noise.
A capacitor to +5V, NOT AGND (correction needed for PCB designs) will form a capacitive divider with the output's capacitance to substrate, so my "bog standard" 10nF will form a voltage divider that attenuates the clock/data etc. feedthrough from the substrate to output by around 36dB or around / 60 times. Even 3.3nF will kill the switching by 26dB or around / 20 times.
We really need to consider the RF decoupling and the DEM/Audio side as separate problems. Where want RF decoupling to minimise switching noise from inputs (and DEM) is different to where want the audio path.
One danger, noisy supplies. So if you want to make "short loop" decoupling work, your power supplies need to be super clean (<< -90dBV noise). Here TL431 become to noisy. I guess super capacitors or extremely low noise supplies become the sole options.
Now DEM, John made an interesting quip.
He wrote "The DEM Filtering needs RF style decoupling at 200kHz" or something similar. I wholeheartedly agree with that BTW. Now what in the DEM circuit can couple switching noise from the DEM into Substrate?
Oscillator and dividers are differential, so no significant noise leakage there, all leakage should net off to near zero. Edges are opposite on both Pin 16/17 and going downstream.
Biggest issue, the DEM synchronisation if used. So we really need to watch just how symmetrical our drive is (SE Grundig style is clearly a PTS) and avoid any more drive than absolutely necessary.
And all the DEM switches into the DEM Filter capacitors can create issues. So the simple solution, RF style decoupling that kills the noise.
If we do not do all that, then perhaps using a low FDEM (50Hz or lower) is a better choice/lesser evil, if we can get the Capacitor leakage issue under control, long term. I probably continue to decline that road.
AGND vs. DGND is again an issue and irresolvable. Really noise from DEM switching needs to loop to -15V. DEM filter cap's for low audio noise loop to AGND. We have to live with this then.
All in all, a little care with decoupling (-15V to +5V especially) and input signal attenuators and slew rate limiters should help a lot, enough to get the RF noise below general noise.
Thor
PS, is it me or does the TDA1541 latch the bits on the falling edge of BCK in SIM Mode?
So, after decoding the actual 12pF input capacitance as mainly (~ 9pF) being from the PNP transistor fabrication, I realised that because that base region would have actually become a NPN transistor collector, every NPN transistor has as a result around 9pF collector to substrate, unless it uses a different (smaller/larger) geometry.
So let's re-look at our putative input circuit.
The very crudely drawn in red capacitors are all the collectors of NPN Transistors, Anodes of Diodes (in effect also a variation of a NPN Transistor collector) and the PNP transistor Base capacitance's to Substrate, which in turn is a layer of higher resistance bulk P-doped silicon connected to the -15V line.
We can see that there are at least three and likely six more 9pF parasitic capacitors to substrate.
Interestingly the CM/EC Logic that takes over is balanced and so currents into substrate pretty much net off.
This holds for all the various latches inside TDA1541, noise comes from the Input circuit almost exclusively.
This noise is not ground bounce (we actually don't have that at all, it's not a TTL/CMOS IC) but capacitive coupling of unbalanced switching edges into the substrate and from there straight into the output.
Why?
Let's look at the output. The diode connected transistors that block reverse current flows when the bit is inactive have parasitic capacitance to substrate, as do our cascode transistors.
So, all sorts of currents related to edge-speed couple into the substrate which has a certain resistance to -15V and then into the -15V rail. Any of these needle pulse's that cannot be absorbed, and there is always a residual even with perfect decoupling, coupled back into the output. A conceptual schematic of how this noise couples:
At a guess, Cin is maybe 50pF total capacitance that couples noise into the substrate.
Cout perhaps 150pF total per channel.
Substrate resistance - call it 30 Ohm.
(If anyone has better guesses, do say so)
Thus the HPF to substrate is ~ 106MHz. So -15V RF decoupling matters a lot actually. It will sink a material amount of the noise.
A capacitor to +5V, NOT AGND (correction needed for PCB designs) will form a capacitive divider with the output's capacitance to substrate, so my "bog standard" 10nF will form a voltage divider that attenuates the clock/data etc. feedthrough from the substrate to output by around 36dB or around / 60 times. Even 3.3nF will kill the switching by 26dB or around / 20 times.
We really need to consider the RF decoupling and the DEM/Audio side as separate problems. Where want RF decoupling to minimise switching noise from inputs (and DEM) is different to where want the audio path.
One danger, noisy supplies. So if you want to make "short loop" decoupling work, your power supplies need to be super clean (<< -90dBV noise). Here TL431 become to noisy. I guess super capacitors or extremely low noise supplies become the sole options.
Now DEM, John made an interesting quip.
He wrote "The DEM Filtering needs RF style decoupling at 200kHz" or something similar. I wholeheartedly agree with that BTW. Now what in the DEM circuit can couple switching noise from the DEM into Substrate?
Oscillator and dividers are differential, so no significant noise leakage there, all leakage should net off to near zero. Edges are opposite on both Pin 16/17 and going downstream.
Biggest issue, the DEM synchronisation if used. So we really need to watch just how symmetrical our drive is (SE Grundig style is clearly a PTS) and avoid any more drive than absolutely necessary.
And all the DEM switches into the DEM Filter capacitors can create issues. So the simple solution, RF style decoupling that kills the noise.
If we do not do all that, then perhaps using a low FDEM (50Hz or lower) is a better choice/lesser evil, if we can get the Capacitor leakage issue under control, long term. I probably continue to decline that road.
AGND vs. DGND is again an issue and irresolvable. Really noise from DEM switching needs to loop to -15V. DEM filter cap's for low audio noise loop to AGND. We have to live with this then.
All in all, a little care with decoupling (-15V to +5V especially) and input signal attenuators and slew rate limiters should help a lot, enough to get the RF noise below general noise.
Thor
PS, is it me or does the TDA1541 latch the bits on the falling edge of BCK in SIM Mode?
Use 74F... Logic. Runs on 5V, but input levels are TTL (well, it is advanced fast schottky TTL) as are output levels.
All bipolar, no FET in sight.
Cobalt? Nope:
Boron, Niobium.
Interesting. Looks like 24% Boron make a good magnetic alloy.
in-Plane BH-loop of the B= 24% amorphous ribbon measured by BH-loop tracer. Inset represents the low magnetic field behaviour of the same sample.
But again, Amorphous has an input here, because the alloy must be amorphous. Cannot be another allow.But Nanocrystalline or not is not relevant.
And the key part is the chemistry which is NOT "nanocrystalline iron". The "magic" is "nanocrystalline".
Thor
PS, need into Boron/Iron cores more.
Yes Thorsten, dive into the matter of modern core materials because, until now, you knowledge is lacking a bit.
Nanocrystalline means nothing more than an after treatment of the basic material which is amorphous in crystal structure (lacking an organized crystal pattern).
With nanocrystallinization a "nano" level regular pattern of crystals develops. This process is comparable with after treatment of silicon steel to improve properties like permeability and core loss (HiB an example).
Nanocrystalline toroidal cores have properties which, like the best grades of permalloy, make them eminently suited for (small) signal applications.
Nanocrystalline means nothing more than an after treatment of the basic material which is amorphous in crystal structure (lacking an organized crystal pattern).
With nanocrystallinization a "nano" level regular pattern of crystals develops. This process is comparable with after treatment of silicon steel to improve properties like permeability and core loss (HiB an example).
Nanocrystalline toroidal cores have properties which, like the best grades of permalloy, make them eminently suited for (small) signal applications.
According with the datasheet, the process starts when LE returns to L level (falling). If I interpreted well.
Yes, if I understand well, the amorphous is a "mean"/support for the crystal nanoparticles.
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This is very sound, I like it. I can add a 5V PSU shunt reg for it (all circuits of this DAC except the TDA are 3V3). Is plenty of room in my TDA DAC.
Amorphous is just a state of solid matter.
For amorphous Fe/Bo (plus traces of others) boron atoms essentially replace iron atoms in a iron mass that has no crystal structure.
Nanocrystalline is obviously something has a crystal lattice that is on a "nano" (small) scare compared to standard materials.
If we get GOSS (Grain Oriented Silicone Steel) it means the lamination of tape of the steel is oriented with the crystalline structure of the Steel and the steel is mainly alloyed with Silicon.
If we wanted to be fashionable, perhaps we call it "a mophous macrocrystalline core". Hey that sounds sexy. Who wants their SE Output transformers with a "mophous macrocrystalline core".
First, I'm still waiting for evidence. And second, what you write is unqualified. By not qualifying what additional properties the "nanocrystalline core" requires - you are in fact saying "ALL Nanocrystalline toroidal cores...." which I do not think is your intention (unless it is).
Thor
No not my intention; there are different grades (B-H curve).
This is an interesting read how it is made; also includes a table of magnetic properties of Finemet cores compared with the classic stuff like 80% permalloy:
https://www.hilltech.com/pdf/hl-fm10-cFinemetIntro.pdf
By the way; the brochure is from 2005....so it clearly is not "new" or whatever.
This is an interesting read how it is made; also includes a table of magnetic properties of Finemet cores compared with the classic stuff like 80% permalloy:
https://www.hilltech.com/pdf/hl-fm10-cFinemetIntro.pdf
By the way; the brochure is from 2005....so it clearly is not "new" or whatever.
I have a pair of Cinemag Line Input Transformer 1 : 1 Winding Ratio High input impedance: 18kS with 15K load Good bandwidth (-3 dB at 72 kHz - 15K load) Excellent CMRR: Single shield - 105 dB at 60 Hz.
https://cinemag.biz/line_input/PDF/CMLI-15-15B.pdf
Will these work if I wire them up to the SE output for a balanced output?
https://cinemag.biz/line_input/PDF/CMLI-15-15B.pdf
Will these work if I wire them up to the SE output for a balanced output?
It is!
Interesting for reclocking BCK.
But the LE signal uses the rising edge to latch the data into the output registers.
You can see the implied bit latching on the falling edge here as well...
Here all timing written into the TDA1541 timing diagram. This is for my own elucidation.
I am looking to refactor re-clocking so that from a 512X MCK we use the lowest synchronous relocking frequency and phasing that will work reliably.
Thor
Interesting, this brings back memories. Too bad signal trafos are basically a "hobby" of mine when working for the trafo company, and so I not take some important notes****, grrrrrrr ;-) nor had a time to seriously develop it.
Then I remembered a little test I made: I measured the B-H curve of toroidal cores disponibles at that local that time. The nanocrystalline I used for my signal trafos measured a B/H curve almost square, and impossible to detect any hysteresis with my "poor" equipment. Contrast to "normal" amorphous: round B-H curve and some visible hysteresis (and this provokes more HD in low freq. than the nanocrystalline). But both are far less non-linear than GOSS. Too bad I not had any permalloy to compare, and the disponible ferrites are disastrous.
Of course, the grades/types disponible there at that time. Anyway, amorphous and nanocristalline results in different animals in general. At least the core seller said to my boss and to me ;-)
In doubt, measure and wonder or reject...
+1. But at same time, some makers of these trafos certainly wants to make it secret ;-)
My pair of little permalloy trafos mentioned in this post is ready. I will measure them in the following days. Some data: 2x50 turns primary, 2x 800 turns secondary. It is intended for balanced simultaneous mode, one TDA1541A per channel. For measuring I used only one half, between the center tap and one end. The I/V resistor at the primary is 68R, at the secondary is 18k. So the reflected I/V resistor is about 34R.
The voltage at the primary is 48 mV rms, at the secondary 730 mV rms. Bandwidth -3 dB is 20 Hz to 40 kHz. THD at 1 kHz is 0.02%. It seems THD goes high at 20 Hz, I will look at it. Note this is full scale signal. The test signal was 1.41 V rms through a 1k series resistor, simulating a current source of 4 mApp.
@ThorstenL and @DIYBras if you have any recommendation on how and what to measure, please tell me. I have a Tektronix SG505 audio generator 10 Hz to 100 kHz, THD <0.0005% and a matching AA501 level meter/THD analyzer, 24-bit 48 kHz sound card, FFT analyzer...
The TDA1541A with NE5534AN I/V measured 0.00085% THD at full scale, for comparing.
The voltage at the primary is 48 mV rms, at the secondary 730 mV rms. Bandwidth -3 dB is 20 Hz to 40 kHz. THD at 1 kHz is 0.02%. It seems THD goes high at 20 Hz, I will look at it. Note this is full scale signal. The test signal was 1.41 V rms through a 1k series resistor, simulating a current source of 4 mApp.
@ThorstenL and @DIYBras if you have any recommendation on how and what to measure, please tell me. I have a Tektronix SG505 audio generator 10 Hz to 100 kHz, THD <0.0005% and a matching AA501 level meter/THD analyzer, 24-bit 48 kHz sound card, FFT analyzer...
The TDA1541A with NE5534AN I/V measured 0.00085% THD at full scale, for comparing.
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