I don't think so. In fact, somebody on ASR pointed me to a bunch of ES9038PRO commercial products that do have the hump.
It is what it is, will try the counter-hump (I would not bet a dime that any solution doesn't come without some trade-offs), otherwise CS43198 is probably my next best bet. AK4499 is for 2022 (if that).
BTW, the Si570 with its high low frequency phase noise and horrible close in phase noise is perfect, can't get any better in a DAC, measurement wise. Too bad some can hear it's horrible screechy sound.
I forget which DAC, but at least one product at ASR was measured that uses the very new ES9068AS. It seemed to match the 9038PRO performance but had no hump. I assume this 9068AS is the successor to the 9038Q2M but I'm not sure.
Yes, I’m expecting every day now UPS to drop a box with ES9068AS samples, data sheet and application notes
.Forgot to mention, in #525 the 2nd and 3rd harmonics are tuned to a minimum via the dedicated registers in the DAC. As you can see, these optimization have no impact on the hump position and height. I was not expecting anything, hump related, (other tried as well, with the same non result) but it’s probably good to know what we can do with these registers. The THD can be brought down by 15dB from these registers.
I don’t think there was ever a definitive root cause for the hump issue, and of course, ESS is mum about, not even a pip of acknowledgment ever leaked. I have my own opinion, but I would not put it here, since it is only what my guts are telling me about, no hard proof.
Some people did the empiric skunk work and found a combination of output filter that pretty much eliminates the hump, but this approach is not without trades, higher THD and THD+N. For audio reproduction, is not worth the trouble, the issue is orders of magnitude under the audibility thresholds for humans (minus Markw4, of course). Big problem for instrumentation, though, and really a pity, look in #525 what can this DAC otherwise do.
How to Fix ESS Hump on SGD1 and LA-QXD1 | Audio Science Review (ASR) Forum
Some people did the empiric skunk work and found a combination of output filter that pretty much eliminates the hump, but this approach is not without trades, higher THD and THD+N. For audio reproduction, is not worth the trouble, the issue is orders of magnitude under the audibility thresholds for humans (minus Markw4, of course). Big problem for instrumentation, though, and really a pity, look in #525 what can this DAC otherwise do.
How to Fix ESS Hump on SGD1 and LA-QXD1 | Audio Science Review (ASR) Forum
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One thing I haven't seen anyone try is a small RF trap pre I-V.
A small value inductor can be placed in series with I-V OPA IP and at the DAC end a
small shunt cap to ground.
This could be set to around 3 to 400kHz such that at 20kHz there is very little voltage swing at the DAC OP and hence no resulting non linearity.
Just a thought.
TCD
A small value inductor can be placed in series with I-V OPA IP and at the DAC end a
small shunt cap to ground.
This could be set to around 3 to 400kHz such that at 20kHz there is very little voltage swing at the DAC OP and hence no resulting non linearity.
Just a thought.
TCD
It seems to me that if this was an issue, we'd see it above the kHz range. OPA1611 is not that slow.
I'd try something like an ADA4899 or LTC6228 to prove the theory. They can linearly handle very fast and large signals (within supply limits...). If it were truly the op-amp I would have thought that syn08 would have seen more difference between the OPA1622, 1612, and 1656.
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I do wonder if the THD trim is actually useful or just cheating your personal test setup.
I suppose so, there’s no IMD increase/reduction without a HD increase/reduction, IMD and HD are created by the same nonlinearities and are mathematically related.
Since ESS is telling ****, as usual, I can only speculate that the harmonic distortion compensation works like kind of an “offset”, to compensate for small circuit asymmetries that may impair distortion cancellations, this is based on reports claiming that the registers have a measurable effect only in balanced output configurations. One thing I can tell for sure, to my experience the register settings depend strongly on the op amp used in the IV stage. I don’t know how reproducible they are vs. the component dispersion/tolerances.
I’ve heard ESS has a patent on this distortion compensation mechanism, but I never bothered to search for.
There's some old talk here regarding ESS DAC internal distortion handling and patents starting with post #70, not sure if that's it?
ESS THD ‘Hump’ Investigation | Page 4 | Audio Science Review (ASR) Forum
btw ESS have quite recently (February 8, 2021) updated their ES9038PRO datasheet to v3.7, just in case, changes are "Added Registers 57-61 Descriptions..".
.SABRE Audiophile DACs – ESS Technologies
https://www.esstech.com/wp-content/uploads/2021/03/ES9038PRO-Datasheet-v3.7.pdf
ESS THD ‘Hump’ Investigation | Page 4 | Audio Science Review (ASR) Forum
btw ESS have quite recently (February 8, 2021) updated their ES9038PRO datasheet to v3.7, just in case, changes are "Added Registers 57-61 Descriptions..".
.SABRE Audiophile DACs – ESS Technologies
https://www.esstech.com/wp-content/uploads/2021/03/ES9038PRO-Datasheet-v3.7.pdf
May somebody will be so kind to translate this "description" to English?
P.S. And also to explain - what is the purpose of "+18dB Gain"
Yes, I’m expecting every day now UPS to drop a box with ES9068AS samples, data sheet and application notes
Forgot to mention, in #525 the 2nd and 3rd harmonics are tuned to a minimum via the dedicated registers in the DAC. As you can see, these optimization have no impact on the hump position and height. I was not expecting anything, hump related, (other tried as well, with the same non result) but it’s probably good to know what we can do with these registers. The THD can be brought down by 15dB from these registers.
Have you seen this post from John Siau of Benchmark?
Review and Measurements of Benchmark DAC3 | Page 16 | Audio Science Review (ASR) Forum
I'm not sure I buy it.
.
Hump problem is said to be usually more in the differential summing stage, although once that is cleaned up some still remains in the I/V. So, results may depend on which opamps were swapped.
"Is said" being the keywords.
Until I'll sort out the "hump" issue, here's everything together: ADC, clock generator, DAC in a digital loop (so analog in, analog out). THD @1KHz is about -118dB (0.00013%), THD+N @1KHz is about -113dB, both in a 20KHz bandwidth, both are minimum values and measured without any extra filters in the analog paths. Pretty much in line with what I was expecting to start with...
One small surprise was that running the DAC synchronously with the ADC (that is, using the MCLK generated by the clock generator to clock both the ADC and the DAC) vs. running the DAC from it's own Si570 clock @50MHz doesn't make a iota of a difference. Both clocks are locking just fine, no difference in measurements. Intuitively (never thought about in depth) I was expecting the synchronous operation to be at least slightly better, at least in term of noise, but nothing, zip, nada.
I don't think the hump has anything to do with the common mode distortions. We can speculate until the cows come home, but I guess only ESS could clarify, unfortunately they have no incentive to even admit their chips have a design blunder inside. I am surprised that their team of "golden ears" they claim to use to feed back in the design process didn't catch this issue during the extensive listening sessions.
I'll put everything in an analog loop (digital in, digital out) ASAP and be back with the results, I would not expect much of a difference, though.
P.S. I edited the name of the original post #1 to better reflect the content, don't know if it's possible to change the thread name accordingly, and if so, how.
One small surprise was that running the DAC synchronously with the ADC (that is, using the MCLK generated by the clock generator to clock both the ADC and the DAC) vs. running the DAC from it's own Si570 clock @50MHz doesn't make a iota of a difference. Both clocks are locking just fine, no difference in measurements. Intuitively (never thought about in depth) I was expecting the synchronous operation to be at least slightly better, at least in term of noise, but nothing, zip, nada.
I don't think the hump has anything to do with the common mode distortions. We can speculate until the cows come home, but I guess only ESS could clarify, unfortunately they have no incentive to even admit their chips have a design blunder inside. I am surprised that their team of "golden ears" they claim to use to feed back in the design process didn't catch this issue during the extensive listening sessions
.I'll put everything in an analog loop (digital in, digital out) ASAP and be back with the results, I would not expect much of a difference, though.
P.S. I edited the name of the original post #1 to better reflect the content, don't know if it's possible to change the thread name accordingly, and if so, how.
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