Many people don't even pay attention to it. It appears on quiet recordings or after the end of the track. Similar to the murmur of water 0.5-2 sec. If you hear it once, then it will haunt you constantly, like a ghost in a castle.Could please describe in a little more detail what 'murmur effect' is, or what it sounds like? Thanks
And it is not only the DCS2 that has this effekt. As I recall it all the No-dac DSD dacs have the same more or less. The only one that didn´t have it (or very attenuated) was a 74auc1g74 based No-dac. The DCS 2 I have now had it when supplied with batteries, but the new mains PS I use now, strangely, doesn't have itMany people don't even pay attention to it. It appears on quiet recordings or after the end of the track. Similar to the murmur of water 0.5-2 sec. If you hear it once, then it will haunt you constantly, like a ghost in a castle.
I can honestly say I have never encounttered the murmering ghost in any of my DSD decoder projects from the very basic lo-pass filter, through no-DAC and onto DSC2, Valve DAC and most recently Marcel's RTZ DAC - am I lucky or hard of hearing?
Anyway, I ordered a small batch of PCBs for the new version of DSD'it last evening. I remembered just how difficult it is to solder the NKD oscillators so I ordered an SMD stencil too with the intention of asking my friend to solder the boards in his reflow oven.
Anyway, I ordered a small batch of PCBs for the new version of DSD'it last evening. I remembered just how difficult it is to solder the NKD oscillators so I ordered an SMD stencil too with the intention of asking my friend to solder the boards in his reflow oven.
This resampler circuit consists of two stages. The first IC upsamples to PCM176/192. This was done to bypass the AK4137 bug. He is very bad at resampling PCM44/48->DSD256
I noticed that if before converting PCM->DSD on the second AK4137, upsampling PCM->PCM to Roon, then the murmur disappears. There is also no murmur if you use the "AMSDM7 512+fs" modulator in HQPlayer.
That is, this modulation noise depends on the input signal, and does not occur in the DAC itself.
So I just decided to try to make the first PCM->PCM stage on another chip. And fortunately for us, the SRC4192 IC works exactly the same as Roon's software conversion. I can't hear that modulation noise anymore.
Hi @ppy,
Thanks so much for publishing DSD’it. I own a AK4499EQ DAC and would love to build one. As I’m studying the documentation, a couple of questions and perhaps suggestions:
Questions:
- How does the 44-48 signal relate to Cable_Plugged? I understand to forward Cable_Plugged from J1.1 to J4.1. But why have J3 to instead forward the U5 output for a XING U30? I also understand that U5 outputs whether the signal is an integer multiple of 44.1 or 48 kHz, but how does this relate to Cable_Plugged? From the U30 datasheet I believe that it too has Cable_Plugged on pin 1.
- C2 and C3 are the decoupling capacitors together with C4 and C8, right? The SRC4392 datasheet suggests 10 uF for them; in this BOM they are 100 uF. Is this on purpose?
- The AK4137 data sheets suggests to use two sets of decoupling capacitors, one on both of the DVDD pins: 0.1 uF || 10 uF. This seems distinct from this design with one set of 0.1 uF C19 || 100 uF C21. Is this on purpose?
- Same and final question on the decoupling capacitors suggested values for C9 and C10 are 10 uF, but the BOM specifies 100 uF.
- Could the startup time be improved? What is the wait for 3 seconds beginning of setup and 1 second after writing the configuration? From the datasheets it seems that the AK4137 starts in 5 ms maximum and the SRC4392 in less than that. This is also the minimum interval between I2C writes.
- Per the SRC4392 datasheet, the RDY signal could be used to set the MUTE signal. This could prevent pops and clicks when the input sample rate changes. U4 could be replaced with a gate with 3 inputs.
- When DSD_on is high, the SRC4192 and AK4137 could be powered down to save power, decrease heat dissipation and increase lifetime. An PNP transistor could be used with DSD_on at its base and RST as emitter.
- The AK4137 datasheet suggests for a microcontroller to cycle PDN immediately when SRCEN is high, indicating over-current or over-voltage was detected. SRCEN could be connected to PB4. I can write the necessary Arduino code if you’d like.
- The AK4137 datasheet also indicates to leave XTO open instead of connected to DVSS. Looking at datasheet figure 21 it may now draw more current than necessary, which may induce jitter on the side of the clock.
- On the AK4137, disable semi-auto soft mute. It seems redundant with the manual mute logic in place, which is more accurate. Also from the datasheet it is not entirely clear to me whether enabling the bit makes it follow the SMSEMI pin, which is pulled low anyway.
- On the AK4137, enable FORCESTB to disable checking for IRCK and OLRCK changes. ILRCK won’t change for sure, and I don’t think OLRCK would either even in slave mode.
I don’t think I2SoverUSB has anything like a Cable_Plugged signal, does it? Do you know the best practice on this?
I2SoverUSB can be strapped to output either 45/49MHz clocks, or else 22/24MHz. The different clock frequencies come out on different pins. Also, I2SoverUSB has a MUTE signal and an DSD_ON signal that may be useful. Not sure if Mute is asserted when no USB cable is plugged in.
That said, and with no disrespect meant to ppy, there is another DSD converter thread in the forum that uses an FPGA instead of ASRC chips like AK4137. So far I am preferring the FPGA version, which I believe is because it is a synchronous converter. Therefore no PLL/PPLL like in an ASRC that IME can cause a little bit of jitter in the best of circumstances. May depend on your dac and your system as to whether there might be any noticeable difference in sound.
Hi,
Pavel, if I understood you correctly, you said that the murmur effect disappeared thanks to the conversion in the first stage to PCM 172/192 on the SRC4192 chip. But in the first version of your upsampler based on two AK4137 chips, the first stage based on one AK4137 also converted only to PCM172/192.
So what do you think makes the sound better on the second SRC version based on SRC4192/AK4137 ?
Or maybe both versions of SRC have comparable sound quality?
Pavel, if I understood you correctly, you said that the murmur effect disappeared thanks to the conversion in the first stage to PCM 172/192 on the SRC4192 chip. But in the first version of your upsampler based on two AK4137 chips, the first stage based on one AK4137 also converted only to PCM172/192.
So what do you think makes the sound better on the second SRC version based on SRC4192/AK4137 ?
Or maybe both versions of SRC have comparable sound quality?
AK4137 and IIRC SRC4192 have best-in-industry specs for ASRCs. They are not exactly the same for every spec, but they are both premium ASRC products. Measured distortion for some conversion modes can be between -140dB and -150dB, somewhere down around there. They have different power supply requirements, and differ in other ways, but they are very similar in overall sound quality. An issue they both have when used in otherwise synchronous systems for sample rate conversion is that they both use what has been referred to as a PPLL (Polyphase Locked Loop). They are similar to regular PLLs but tend to be more stable for reasons as were described by @werewolf in the thread at: https://www.diyaudio.com/community/threads/asynchronous-sample-rate-conversion.28814/
Problem with PPLLs do exist though. They can be sensitive to incoming jitter and or to power supply noise. What noise can do is cause them to slightly mis-estimate real time polyphase resampling filter coefficients. That would be expected to result in some numerical errors in I2S output calculations. Likely they are pretty small errors, but pretty small is not exactly = zero. Thus, for a fully synchronous DAC, a synchronous upsampling DSD converter can be a little better than an asynchronous one. How to I know? I built both. Mine was a rather more elaborate and more costly to build dual AK4499 DSD converter. Recently I tried an FPGA based synchronous converter project posted here in the forum not of my design. My design lost, what can I say? I'm using the one that sounds best to me. So far seems to sound a little better than HQ Player ADMS7 modulator, and I like the FPGA upsampling algorithm better than the recommended HQ Player windowed sinc upsampling filters.
One guy's opinion for whatever it may be worth, is all.
Problem with PPLLs do exist though. They can be sensitive to incoming jitter and or to power supply noise. What noise can do is cause them to slightly mis-estimate real time polyphase resampling filter coefficients. That would be expected to result in some numerical errors in I2S output calculations. Likely they are pretty small errors, but pretty small is not exactly = zero. Thus, for a fully synchronous DAC, a synchronous upsampling DSD converter can be a little better than an asynchronous one. How to I know? I built both. Mine was a rather more elaborate and more costly to build dual AK4499 DSD converter. Recently I tried an FPGA based synchronous converter project posted here in the forum not of my design. My design lost, what can I say? I'm using the one that sounds best to me. So far seems to sound a little better than HQ Player ADMS7 modulator, and I like the FPGA upsampling algorithm better than the recommended HQ Player windowed sinc upsampling filters.
One guy's opinion for whatever it may be worth, is all.
This project was made a very long time ago. Much has already been forgotten. I will only answer what I remember without diving back into this project.
1. The board design was developed for Amanero. Pin 1 there can be assigned to switch 44-48. U30 can use F0 and DSDon signal. But the circuit board needs to be modified.
2. I used my favorite and sound tested KEMET T520B107M006ATE040 tantalum polymer capacitors.
5. I don't remember anymore. There was a reason for this, but now I find it difficult to answer.
Yes, you understood correctly. If the PCM bitrate is increased using the SRC4192, then there is no murmur. I don't hear any difference in sound quality between dual AK4137 or SRC4192+AK4137. Therefore, the SRC4192+AK4137 circuit, with the same sound quality, benefits from the absence of murmur. The reason for this strange behavior is unknown to me.