The 75 mA I put in the opening post is a somewhat conservative calculated value, so that fits well with your measured 67 mA. My 2.7 A is the sum of the datasheet values of the valve heater currents (neglecting the 31.5 mA through the two 100 ohm resistors), but some E88CCs draw a bit more heater current than others. I'll also put your measured values in the opening post.
For the record, I mixed up the anode and the cathode. The cylinder is the cathode and the rod is the anode, so it's the cylinder that normally lights up. Attached are a picture from G. F. Weston, Cold cathode glow discharge tubes and a home-made photo of a Pope 85A2 with relatively thin gettering.
Attachments
Marcel,
I have a little bit of time to get this dac operational and am having trouble with the I2S wiring from the JLSounds I2SoverUSB3 board (see attached manual).
My interpretation is as follows:
P9.1 <---- ??
P9.2 <---- ??
P9.3 <---- JL H3.20
P9.4 <---- ??
P9.5 <---- JL H3.13
P9.6 <---- JL H3.14
P9.7 <---- ??
P9.8 <---- ??
P9.9 <---- JL H3.11
P9.10 <---- JL H3.12
P9.11 <---- JL H3.15
P9.12 <---- JL H3.16
P9.13 <---- ??
P9.14 <---- ??
P9.15 <---- JL H1.8
P9.16 <---- JL H1.10
P9.17/18/19/20 no connection
Big holes in my knowledge right there.
Anthony
The manual isn't entirely clear to me either, but you could try this:
P9.1 <---- fifth contact on the source selection switch if you also want to use the DIX4192 inputs, can be connected straight to P9.2 when you only need the I2S/raw DSD input
P9.2 <----
P9.3 <---- JL H3.20
P9.4 <---- JL H3.19
P9.5 <---- JL H3.13
P9.6 <---- JL H3.14
P9.7 <---- leave open, or connect a switch between P9.7 and P9.8 (*)
P9.8 <---- leave open, or connect a switch between P9.7 and P9.8 (*)
P9.9 <---- JL H3.11
P9.10 <---- JL H3.12
P9.11 <---- JL H3.15
P9.12 <---- JL H3.16
P9.13 <---- JL H1.5
P9.14 <---- JL H1.2
P9.15 <---- JL H1.8
P9.16 <---- JL H1.10
P9.17/18/19/20 no connection
(*) With such a switch you could manually activate the de-emphasis if you ever use the I2S interface to play rips of CDs with pre-emphasis. Those would typically be very old CDs, as using pre-emphasis/de-emphasis on CDs very soon went out of fashion.
It's a pity that the connections straight to H1 are needed, as those mess up the isolation feature of the USB interface board. If you don't want that, you will have to add two optocouplers and a few resistors or one optocoupler, some resistors and an inverter.
By the way, the only DSD formats that the original valve DAC supports are 44.1 kHz-based DSD64 and DSD128, so 2.8224 MHz and 5.6448 MHz sample rate. Other DSD formats will probably result in loud noise.
P9.1 <---- fifth contact on the source selection switch if you also want to use the DIX4192 inputs, can be connected straight to P9.2 when you only need the I2S/raw DSD input
P9.2 <----
P9.3 <---- JL H3.20
P9.4 <---- JL H3.19
P9.5 <---- JL H3.13
P9.6 <---- JL H3.14
P9.7 <---- leave open, or connect a switch between P9.7 and P9.8 (*)
P9.8 <---- leave open, or connect a switch between P9.7 and P9.8 (*)
P9.9 <---- JL H3.11
P9.10 <---- JL H3.12
P9.11 <---- JL H3.15
P9.12 <---- JL H3.16
P9.13 <---- JL H1.5
P9.14 <---- JL H1.2
P9.15 <---- JL H1.8
P9.16 <---- JL H1.10
P9.17/18/19/20 no connection
(*) With such a switch you could manually activate the de-emphasis if you ever use the I2S interface to play rips of CDs with pre-emphasis. Those would typically be very old CDs, as using pre-emphasis/de-emphasis on CDs very soon went out of fashion.
It's a pity that the connections straight to H1 are needed, as those mess up the isolation feature of the USB interface board. If you don't want that, you will have to add two optocouplers and a few resistors or one optocoupler, some resistors and an inverter.
By the way, the only DSD formats that the original valve DAC supports are 44.1 kHz-based DSD64 and DSD128, so 2.8224 MHz and 5.6448 MHz sample rate. Other DSD formats will probably result in loud noise.
Thanks Marcel, I'll give that a try. At this stage I just want to get something playing so will not bother with anything from the JLSound H1. My understanding is that the ValveDac wants to see 0V on P9.15 for PCM which also equates to all of the JL H1 wires being disconnected...which is easy to do.
Can you check the voltages in the circuit that drives the 85A2 - the voltages you can access without shorting anything, that is? If everything were OK, you should get something like this, all voltages with respect to ground:
+3V3: about 3.3 V
nswitch85A2: first 3.3 V and then 0 V, after a second or two
collector Q8: first somewhere between -300 V and -200 V, and then +2.5 V
collector Q10: 5 V when the 85A2 is off, 0.2 V when it is on
ignited85A2: 0 V when the 85A2 is off and 3.1 V when it is on
+3V3: about 3.3 V
nswitch85A2: first 3.3 V and then 0 V, after a second or two
collector Q8: first somewhere between -300 V and -200 V, and then +2.5 V
collector Q10: 5 V when the 85A2 is off, 0.2 V when it is on
ignited85A2: 0 V when the 85A2 is off and 3.1 V when it is on
+3V3 is about 0.033V (D6 - R125). Checked P9.19 - P9.20 and get 0V, so it looks like no 3.3V is being sent out from the FPGA.
nswitch85A2 is 0.033V.
Collector Q8 -200V
Collector Q10 4.972V
ignited85A2 0.031V
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That's good news, then it probably isn't a short or an early failure of the FPGA module. Just to double-check, with everything powered down, do you measure a very low resistance (say < 5 ohm) between +3V3 and ground?
Assuming you don't:
Can you check if J5 pins 35 and 36 are soldered properly? J5 pins 35 and 36 are supposed to conduct the 3.3 V from the FPGA module to the +3V3 net. What happens when you short P9.17, P9.18, P9.19 and P9.20? That would provide an alternative path from the 3.3 V to the +3V3 net.
Assuming you don't:
Can you check if J5 pins 35 and 36 are soldered properly? J5 pins 35 and 36 are supposed to conduct the 3.3 V from the FPGA module to the +3V3 net. What happens when you short P9.17, P9.18, P9.19 and P9.20? That would provide an alternative path from the 3.3 V to the +3V3 net.
Tried +3.3V at a few spots and all resistances were high with nothing even close to 5R.
The FPGA pins seem to be soldered well enough and I have continuity between C87 and J5.35. I'll pluck up the courage to remove the FPGA in the morning and reflow J5. When shorted between P9.18 and P9.20 the 85A2 instantly lights up which is certainly promising.
The FPGA pins seem to be soldered well enough and I have continuity between C87 and J5.35. I'll pluck up the courage to remove the FPGA in the morning and reflow J5. When shorted between P9.18 and P9.20 the 85A2 instantly lights up which is certainly promising.