That's surely not "extremely low jitter". Look e.g. at this type: CCHD-957.pdf
Really low noise parts are even better, e.g. models from Abracon (e.g. AOCJY3.pdf), Vectron (e.g. ox-204.pdf) or Wenzel (e.g. BTULN.pdf). But those are difficult to get at frequencies useful for audio, and they are very expensive (for reasons not fully clear to me--comments welcome).
Samuel
Making the ultra high performance ovenized oscillators is not a simple thing to do. The best available represent years of experience tweaking small parameters. Compare this http://www.oscilloquartz.com/files/1363164953-Br_ OCXO 8607.pdf to the Wenzel Blue Top. They represent alternate optimizations from the crystal blank out. The BVA is about 10-15 dB better at 1 Hz but the Blue Top is 20 dB better at 100 KHz.
The phase noise goes up on higher frequency crystals. They are thinner and have lower Q. All of the really high performance oscillators use SC cut crystals that need to be ovenized, usually something like 60 degrees C. There is a lot of manual tweaking to get them right. Even the oven temperature needs to be optimized. The Blue Top's are around $1500 (my quote is 2 years old now) and take as much as 3 months to make for a custom frequency. I gather the BVA is more like a year and $5K. But that is third hand info.
The Crystek and the NDK's are probably the best value and more than good enough if treated properly. We are not trying to receive microwave signals from far off spacecraft or doing specialized Very-long-baseline interferometry New VLBA Site where the timing is important. Past a certain threshold no more improvement can be had with lower jitter.
The phase noise goes up on higher frequency crystals. They are thinner and have lower Q. All of the really high performance oscillators use SC cut crystals that need to be ovenized, usually something like 60 degrees C. There is a lot of manual tweaking to get them right. Even the oven temperature needs to be optimized. The Blue Top's are around $1500 (my quote is 2 years old now) and take as much as 3 months to make for a custom frequency. I gather the BVA is more like a year and $5K. But that is third hand info.
The Crystek and the NDK's are probably the best value and more than good enough if treated properly. We are not trying to receive microwave signals from far off spacecraft or doing specialized Very-long-baseline interferometry New VLBA Site where the timing is important. Past a certain threshold no more improvement can be had with lower jitter.
Demian what is that threshold? There's too much to look and for those of us who are new to the arena. No point in making things better on the timing end if what comes after can't keep up. I do need a good reference oscillator.
Thanks I'll look at these. How does the studio stuff synchronize the to master clock. It seems to me that for synchronizing to a device which doesn't give the option of running in I2S slave mode the word clocks needs to be synchronized not the master.
I need an answer to if the ADC master CLK operates asynchronous to I2S with respect to the ADC conversion.
When looking for an oscillator for audio then we look at the 10Hz to 1000Hz offset noise in dBc/rtHz for best compared to cost. Is this correct?
If the the word CLK need to be synchronized then a pullable VC oscillator is needed.
I expect a down grade in oscillator performance from adding a PLL in the picture. Some jitter surely must be passed on.
If the the word CLK need to be synchronized then a pullable VC oscillator is needed.
I expect a down grade in oscillator performance from adding a PLL in the picture. Some jitter surely must be passed on.
Quick answers
1) Peak audible sensitivity to phase noise will be in the 5-20 KHz range because the beat products will be in the most sensitve part of hearing. i would compare in the 100 Khz to 10 Hz range and look for an odd shape to the curve. the curve is really normally a function of physics with three corners. Something that is different is suspect. Rubidium clocks are meaningless in this since they contribute at very low frequencies. I would just use the Crysteks (available from Digikey) and move on. I have posted an ultra low noise supply for the Crystek several times here.
2) On the ADC's (even the ESS) if the ADC is running in slave mode then all the clock elements need to be in syntonism (big word that means in frequency but not in specific phase) however word clock and bit clock do need a specific relationship. The chips can sort out small misalignments. Word clock and bit clock handle moving the data from the ADC. The masterclock for the ADC is most critical since problems there cannot be fixed. however a PLL locking a VXCO will give unimpeachable results, however it could take seconds to lock with a really narrow band PLL.
Typically the masterclock lives in the ADC and the rest of the system locks to it. On most pro audio cards there is an option on the digital input selecting internal or external clock. In a larger pro systems word clock (usually as an AES/SPDIF signal) is sent to all the boxes to keep the sample frames in sync. Changing sample rates in those environments is not simple with manual intervention required often.
1) Peak audible sensitivity to phase noise will be in the 5-20 KHz range because the beat products will be in the most sensitve part of hearing. i would compare in the 100 Khz to 10 Hz range and look for an odd shape to the curve. the curve is really normally a function of physics with three corners. Something that is different is suspect. Rubidium clocks are meaningless in this since they contribute at very low frequencies. I would just use the Crysteks (available from Digikey) and move on. I have posted an ultra low noise supply for the Crystek several times here.
2) On the ADC's (even the ESS) if the ADC is running in slave mode then all the clock elements need to be in syntonism (big word that means in frequency but not in specific phase) however word clock and bit clock do need a specific relationship. The chips can sort out small misalignments. Word clock and bit clock handle moving the data from the ADC. The masterclock for the ADC is most critical since problems there cannot be fixed. however a PLL locking a VXCO will give unimpeachable results, however it could take seconds to lock with a really narrow band PLL.
Typically the masterclock lives in the ADC and the rest of the system locks to it. On most pro audio cards there is an option on the digital input selecting internal or external clock. In a larger pro systems word clock (usually as an AES/SPDIF signal) is sent to all the boxes to keep the sample frames in sync. Changing sample rates in those environments is not simple with manual intervention required often.
I'm not yet following what you're trying to achieve. Building your own ADC, or somehow isolate an existing one?
The easiest path to a DIY instrumentation-grade audio frequency range ADC seems to get one of those semi-pro (UBS?) audio interfaces that support ASIO drivers and accept an AES-EBU/SPDIF/TOSLINK input, and to build a master-only ADC (e.g. around the PCM4222 chip).
Regarding clock selection: the Crystek CCHD-957 I linked above is surely good enough even for critical audio applications. Also still reasonably priced and stocked at Mouser. But it's not voltage controlled, so it can only be a master clock, not within a PLL.
Samuel
What I'm doing is interfacing an ADC with the miniDSP's USB streamer. Unfortunately the USB streamer cannot be set as IS2 slave. It operates in master mode only. I would prefer the ADC to be master. The only conceivable way to do this is to force synchronization of the word clocks and let the ADC run on it's own master clock. The USB streamer runs on a 13 MHz oscillator which mean the XMOS processor must synthesize all other clocks signals from 13MHz. I doubt the jitter performance will be suitable for an ADC. IS2, as defined by Phillips, samples the middle of the data. This leaves a lot of fudge room. So I think it would be good enough to get the word clocks reasonably aligned and once lock is achieved let everything free run. This is a lot of fuse but it's $100.00 USB I/F. Not many sound cards offer a digital interface for that price. The question is how to do this without buggering up a $35.00 low phase noise clock. I also want isolation from the USB side. If the AD5394 can run on it's own master clock and allows some other device to be I2S master then synchronizing clocks is non issue. I suppose I could just put the question to AKM.
It's not my intention to marry an ADC to the miniDSP USBStreamer but to have it as an option. An on board SPDIF /AES transmitter would make the ADC available to all else PCI included.
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Having been down these roads here is what i found works-
Both USB (EMU 0404) and PCI interfaces work great over SPDIF. USB is less stable and can be sensitive to other USB traffic. The PCI interfaces are more solid (RME, EMU 1212 or ESI Juli@) are more robust. The TI PCM4222 demo board works pretty well, but its performance is not in the same league as the AKD5394A demo board. Making one from scratch looks really interesting but becomes quite the project. I know of two other efforts underway as well. I'm planning to make an upgrade card for the Juli@, but its on hold pending evaluation of the new AKM ADC.
In practice the master clock is locked to the external input and word clock, bit clock are "jam" synced to the external source. Essentially they are the decoded info from the AES stream. Probably not an issue for a single box.
Crystek has a variation of the CCHD-957 http://www.crystek.com/crystal/spec-sheets/vcxo/CVHD-957.pdf that is a VCXO.
Both USB (EMU 0404) and PCI interfaces work great over SPDIF. USB is less stable and can be sensitive to other USB traffic. The PCI interfaces are more solid (RME, EMU 1212 or ESI Juli@) are more robust. The TI PCM4222 demo board works pretty well, but its performance is not in the same league as the AKD5394A demo board. Making one from scratch looks really interesting but becomes quite the project. I know of two other efforts underway as well. I'm planning to make an upgrade card for the Juli@, but its on hold pending evaluation of the new AKM ADC.
In practice the master clock is locked to the external input and word clock, bit clock are "jam" synced to the external source. Essentially they are the decoded info from the AES stream. Probably not an issue for a single box.
Crystek has a variation of the CCHD-957 http://www.crystek.com/crystal/spec-sheets/vcxo/CVHD-957.pdf that is a VCXO.
I saw the VCXO but the spec are not quite as good.
Maybe a better approach would be to get the USB streamer to work with a receiver. Then I can make the ADC board generic. The transmitter would be isolated with it's transformer or fiber. This would be less involved.
I have a 1212 here which I can dissect. I'll put together a jig to I/F with the USB streamer. This will answer my questions.
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Hi David,
Did you ever look at the information linked here:
http://www.diyaudio.com/forums/equipment-tools/231401-quantasylum-qa400-86.html#post3827264
It does exactly what you seem to be looking for. If the whole thing has to be synchronized to a word clock that can be achieved e.g. with the Crystek VCXO (or two) and a PLL.
Did you ever look at the information linked here:
http://www.diyaudio.com/forums/equipment-tools/231401-quantasylum-qa400-86.html#post3827264
It does exactly what you seem to be looking for. If the whole thing has to be synchronized to a word clock that can be achieved e.g. with the Crystek VCXO (or two) and a PLL.
Which version of the 1212 do you have? The EMU 1212 has spdif in and out and an analog interface to the 1010 card. Its also supposed to work with the 1616 or 1810 depending on version level. Are you going to use the analog i/o module (1010) to connect to the Minidsp or just add spdif i/o to the minidsp?
Modifying the 1010 is not difficult. I upgraded mine and it helped. I would do more but not sure its worth the effort. Its really good to start with. I need to reverse engineer more of the analog circuit.
I can't get my 1212 to talk to the 1616 and it seems to be the 1212. I use the cardbus interface and that works pretty well also.
Dick bought this off ebay but didn't like it. He sent it to me to play with.
The model numbers on the boards are EM8810 for the digital board and EM8820 for the analog/convertor board. What I have in mind in separate the boards. Put a header on a vero board and connect the USB streamer directly to the EMU analog board. That will give me the signals I need to evaluate both.
I can''t stand using the 1212 driver and software. Drive me nuts.
The receivers I've looked at run in I2S master mode. I might be able to connect the master clock from the streamer to the clock pin of the SPDIF receiver but I'm not sure that would work to sync the other clocks.
I can't imagine why miniDSP did it this way. The TOSlink input operates as a slave but only to 176kHz.
Come to think of it, I have a receiver mounted on a board from an old project done years ago. I try it with that as well.
I found my answer at Planet Analog.
Planet Analog - Articles - SIGNAL CHAIN BASICS #54: In audio clocks, who's the boss, master, and slave?
The master clocks need to be at the same frequency.
Planet Analog - Articles - SIGNAL CHAIN BASICS #54: In audio clocks, who's the boss, master, and slave?
The master clocks need to be at the same frequency.
The UI runs under XP ok for me but it's not graceful to try and change sample rates in ARTA and others with the UI. The UI protects the sample rate from being changed from outside apps. After all it is a recording system. I have to stop it, shut ARTA down, make the change in the UI and reopen ARTA. Then I have to match the sample rate in ARTA. After that it works great but what a hassle.
The reference article mentioned at the end of the link above is an excellent article for anyone embarking on building their own sampler. It's shows graphically what happens if...., what can go wrong and goes further making design recommendation. At the end there's a plug for their (the author's) technology but non the less.....
I'm thinking the USB streamer is unsuitable for an high performance ADC. I might be able to get it working with a receiver but any other way might end in disappointment. The best way to I/F two I2S running on there own clocks is to double buffer but that would require a processor to run the whole thing. Way to complicated and therefore not worth it.
I have settle with your conclusion Demain, SPDIF/AES or fiber into a PCI card with the same. The other possibility but more obscure is to use the 1394 port on the PC.
Is there an PCI digital audio I/O solution out there that doesn't have all the other sound card junk on it? Out of the sound cards any suggestions.