Is measuring square wave on spdif cable possible?

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
If you look at the datasheet of CS8414, page 8, it shows the jitter attenuation of the internal PLL, which is zero for jitter/phase noise frequencies up to about 20 kHz. The chip adds its own jitter on top of that, but the main problem is that absolutely no clock cleaning is done...

OK, I think that qualifies for the "bad design" category.

Better receivers like the Wolfson have a digital fractional PLL based on a local XO, and a FIFO, which allow smart locking algorithms and a low PLL corner frequency, hence good filtering.
Indeed.

IMO, SPDIF is obsolete, we have USB asynchronous now. Why bother?
There are times when the galvanic isolation provided by optical toslink is beneficial.
 
There are still a lot of DACs (the majority) which simply use the MCLK/BCK generated by a SPDIF receiver chip to clock the DAC directly. Those clocks are recovered using a PLL.
I would like some measurements, to see how bad it is. I would suspect minimal as neither waveform is that bad for digital. I am currently scope less, no power!!!! But I do need to get some new stuff preferably PC based, as this would not be a hard experiment to do. If anything you may get a negligible rise in the noise floor.

Any news from Stormsonic or any others on Vf factor and sound changes?
 
OK, I think that qualifies for the "bad design" category.

Yes, but it is so common !...

There are times when the galvanic isolation provided by optical toslink is beneficial.

Sure ! But if you use a receiver with zero jitter cleaning, the added jitter of TOSLINK will cause problems... which is why it gets a bad rep, I guess, while it really is the superior solution for SPDIF (no conducted EMI, no ground loops, etc).
 
@marce
Me thinks most misunderstanding come from looking at the same fact from different perspective.
You used to work with computer memory, where signals are indeed digital. All information is carried by logical 0 and 1 and as long you transfer those signal inside digital domain (from HDD to memory, from memory to other bus,...), we can't talk about jitter. All what matters is transition of logical levels.

For S/PDIF, data and clock signals are coded together, combined into single signal. Information is not carried only by logical 1 and 0, also timing of the transition is very important, since clock is not carrying its information only in form of 0 and 1, but also in exact timing. Therefore S/PDIF is not digital signal, but high speed analog or RF signal.
Clock is extracted from S/PDIF signal from edges of transitions and extraction is again analog proces. Any wandering of those edges in time domain will cause timming errors, known as jitter. Right data without bit errors, but arrived at wrong time.
DA conversion rely on perfect clock signal and whatever influence those edges of SPDIF signal and make them shift in time, will create jitter.
Impedance mismatch & wrong termination will create reflections and influence edges of the signal, limited bandwith will influence those edges, suboptimal noisy power supply will influence those edges,....

Marce, could you mark transition points on two waveforms, where S/PDIF receiver chip make decision and where signal level is translated from logical 0 to logical 1 and vice versa? Look at post #113.

jitter.gif
 
Last edited:
Marce, please, please get a scope. Borrow it...or anything, just try to get it. Preferable 100 MHz or more. It will be much easier if you could see thing with your eyes, one afternoon will show you more than reading forum for years. Ad least valid for me, since I am sceptical practical guy, need to see things with my own eyes or hear with my own ears or touch them with my own hands in order to believe.
 
AX tech editor
Joined 2002
Paid Member
@marce
Me thinks most misunderstanding come from looking at the same fact from different perspective.
You used to work with computer memory, where signals are indeed digital. All information is carried by logical 0 and 1 and as long you transfer those signal inside digital domain (from HDD to memory, from memory to other bus,...), we can't talk about jitter. All what matters is transition of logical levels.

For S/PDIF, data and clock signals are coded together, combined into single signal. Information is not carried only by logical 1 and 0, also timing of the transition is very important, since clock is not carrying its information only in form of 0 and 1, but also in exact timing. Therefore S/PDIF is not digital signal, but high speed analog or RF signal.
Clock is extracted from S/PDIF signal from edges of transitions and extraction is again analog proces. Any wandering of those edges in time domain will cause timming errors, known as jitter. Right data without bit errors, but arrived at wrong time.
DA conversion rely on perfect clock signal and whatever influence those edges of SPDIF signal and make them shift in time, will create jitter.
Impedance mismatch & wrong termination will create reflections and influence edges of the signal, limited bandwith will influence those edges, suboptimal noisy power supply will influence those edges,....

Marce, could you mark transition points on two waveforms, where S/PDIF receiver chip make decision and where signal level is translated from logical 0 to logical 1 and vice versa? Look at post #113.

jitter.gif

I think peufeu's post above puts this in perspective.
You describe a DAC that does nothing to clean the jitter. I have called that a 'crap DAC' ;)

Jan
 
Marce, please, please get a scope. Borrow it...or anything, just try to get it. Preferable 100 MHz or more. It will be much easier if you could see thing with your eyes, one afternoon will show you more than reading forum for years.

But as we all keep saying, looking at the data waveform on the cable will not tell you anything about how the DAC output will sound. It is like trying to judge how different ink shades on the sheet music will affect the voices of the choir singing from that score...
 
Jan, with S/PDIF, there will always be jitter.
Whole purpose of S/PDIF interface (cables, connectors, terminations,...) is TO NOT create or introduce additional jitter.
And in case of S/PDIF, you can observe it with such a crude instrument as scope. Search for Persist function (in my scope it is under Display menus), activate it and set for 5 seconds or more.

Since data is coded with clock, only proper way will be sending clock and data separated. Clock from DAC to source and data from source do DAC.
But, if you disregard RF rules for sending 2.8 MHz signal through cable, how would you send 11.x MHz (or more) clock signal through cable without introducing jitter?

IMHO, for future Audio Linear volumes, an article from Jocko about S/PDIF will be very welcomed.
 
What he needs is that jitter-free timebase of the suggested oscilloscope. :D

I continue to be amused at the refusal of anyone to look at DAC outputs, the only thing that actually matters.

And I continue to amused how people don't see, when you start with jittery signal on input, jitter is alredy embedded into signal and you can't eliminate it later in proces.
You can use whatever jitter cleaners you want,...and you will get perfect signal on analog outputs. But don't forget: you started with jitter embedded, assuming you have clean signal :D

There's no such thing as digital: A conversation with Charles Hansen, Gordon Rankin, and Steve Silberman. Part 2 | AudioStream
 
And I continue to amused how people don't see, when you start with jittery signal on input, jitter is alredy embedded into signal and you can't eliminate it later in proces.

I guess the main reason people don't see it is because it isn't so.

Even if you have jitter at the input, you *can* eliminate it completely by reclocking.

...and you will get perfect signal on analog outputs.
Exactly.
 
Yes, inaudible, we are all looking for this and trying to achieve this.
But what is inaudible? 1 ns @ S/PDIF frequency will translate into miliseconds @ audio frequency.
If somebody randomly move your speakers 33.5 cm left-right and front-back, is this inaudible?

Perfect signal on the analog out is the goal

Yes, exactlly. But it will be perfect signal WITH embedded jitter.
Like bad recordings, you can have perfect DAC, perfect cables, everything perfect + your signal on audio outputs will be perfect....except it will sound bad.

SY, please excuse me, aren't we way offtopic, since this thread is about S/PDIF square wave measurement, not about reclockers & jitter cleaners? Is this allowable?
 
But what is inaudible?

Anything you can't hear.

1 ns @ S/PDIF frequency will translate into miliseconds @ audio frequency.
No, it doesn't. How do you get to milliseconds of audio frequency jitter from 1 ns S/PDIF?

If somebody randomly move your speakers 33.5 cm left-right, is this inaudible?
Even that is the wrong analogy, as the speakers (both of them) would be shifted *towards* you, not left-right, if you had milliseconds of audio signal time shifts.

SY, please excuse me, aren't we way offtopic, since this thread is about S/PDIF square wave measurement, not about reclockers & jitter cleaners? Is this allowable?
Sorry, I didn't realize all you cared about was square wave measurement on S/PDIF, and not what audible effect it might cause. Most of us don't actually listen to multiple-MHz square waves.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.