Implementing a true FIFO buffer with low phase noise clock on the Soekris DAM1021 DAC

R2R PCM DAC are not oversampling

Are you properly understand this device? IMG_20201225_221736.jpg
 
Are you properly understand this device? View attachment 904743

It looks like you are not understanding how a R2R ladder DAC works.

The oversampling is done in the FPGA of the DAM1021.
I will throw out all the front end of the DAM1021, saving the swithes, the ladder networks and the power supply.

So the oversampling is gone, but if you like oversampling you can do the job with the PC and then you can feed the FIFO buffer with the oversampled data.
There are lot of applications that do oversampling.
 
OK, so it will be a reversible mod? Cool!

Clock is better - we know!

During your blind listening comparison - watch out for level differences!

It will be very interesting to know about your findings.

//

Yes, the update will be reversible.

I'm just trying to understand the best way to make the update, to get the reversibility as simple as possible.

BTW there is no way to implement the tweak without desoldering some components because the front end has to be isolated.
 

TNT

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But you will compare:

A) "an OK clock + oversampling + 2 level of filters"

against

B) "a very good clock with no or different filters"


- Do you really think that is valuable comparison in any way? What may be deducted from such a test?


//
 
Again, the sonic result.

I'm not interested experimenting in Lego Land town just to play with filters, oversampling and so on.
For me the only target is listening to music as best as possible.

So I will compare the DAM1021 from the factory (claimed as better than MSB and TotalDAC) with the DAM1021 revised in my way using the same songs in the same input format.
 
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Andrea,

I think -but I may be wrong- that none of the modern R2R DAC's ladder suitable -on its own-to fulfilling parameters.

The tolerance of resistors in the ladder limits the resolution.

Without manipulations (for example oversampling, dithering, noise shaping, "self calibrating" etc...etc) these parameters (xx bits, yyy THD etc.) remains unreachable.

If you write another "software" (for example in the another Xilinx), these functions are unavoidable.

If you write it, you just will make another DAC (with appropriate R2R ladders), using of the DAM is unnecessary.
 
You're wrong in the case of the MSB and the Soekris DACs,
they're not plain R2R DACs but sign magnitude DACs.

See this doc on page 5 for some explanation from MSB.

Or an extract from Soekris:
A regular DAC feed by the two’s complement code has the problem that zero crossing goes from all zero'es to all ones's, meaning the distortion goes up at lower levels.
The sign magnitude DAC architecture basically is two DAC's, one for the positive signal and one for the negative signal, resulting in constant distortion at all levels. T.ex. with a -60 db signal, the 10 most significant bits stays at GND for both the negative and positive DAC sections, not the constant switching of all bits....
It's not something I invented, Burr Brown did it with their Colinear chips, starting with the PCM63.... And my DAC is actually physically two R-2R strings, one with +4V ref and one with -4V reference (of course very low noise and with very precise tracking), connected together at the output which can be done as a R-2R network has constant output impedance.
 
OK - I thought you aimed for a clock comparison platform. Bt you aim to demote the original DAM 1021.

The outcome is very interesting of course!!


The 35 € you removed will be replaced by how many €?

//

The oscillators price is know.
I can't estimate the price of the FIFO Lite yet.

Of course much more than the 35 EUR.

But since the original DAM1021 is better than the 100000 USD MSB Tech DAC if I will improve the DAM it will be a real bargain.
 
Andrea,

I think -but I may be wrong- that none of the modern R2R DAC's ladder suitable -on its own-to fulfilling parameters.

The tolerance of resistors in the ladder limits the resolution.

Without manipulations (for example oversampling, dithering, noise shaping, "self calibrating" etc...etc) these parameters (xx bits, yyy THD etc.) remains unreachable.

If you write another "software" (for example in the another Xilinx), these functions are unavoidable.

If you write it, you just will make another DAC (with appropriate R2R ladders), using of the DAM is unnecessary.

It's true, indeed I'm designing my DACs, Lite and Top version.

I would just trying to improve the sonic performance of a DAC that IMHO implements a not properly designed front end (the PLL tracks the input).
So the only way is throwing out all the front end because I cannot access the firmware source code.

The tolerance of resistors in the ladder limits the resolution to around 18 bit with the 0.001% resistors I will use in the top version.
Maybe 18 bit are enough.
IMHO the old 16 bit TDA1541A is one of the best DAC ever designed, maybe the best ever, while I have several doubts about modern delta-sigma DAC (today there are no R2R DAC chip on the market).
Moreover we are thinking also to a "one time calibration", but not "self calibration", another great error IMHO.
 
You're wrong in the case of the MSB and the Soekris DACs,
they're not plain R2R DACs but sign magnitude DACs.

See this doc on page 5 for some explanation from MSB.

Or an extract from Soekris:

Have you any idea about the sign magnitude notation?

The old PCM63 was already a sign magnitude DAC, although Burr-Brown called it as "Colinear".

You have simply to double the R2R ladder to use them with bipolar power supply.

So it's a R2R DAC.