Help, with LAT FET schematic

Bias stability vs supply voltage is poor from 115mA @+-30V to 245mA @+-40V.
Looks like a problem of the VAS with bias current varying between 5,35mA~7.15mA over that supply voltage range.
Power supply rejection will be mediocre which might explain your hum levels.
You will need well stabilized power supplies to compensate these flaws.
Better results are to be expected from well established VAS circuits with controlled current sources.
Besides ultralow THD at 1kHz there are other topics to optimize while playing with LTSpice.

ooops, I see, Elektor design. 😳
They are famous for doing things in a different way than the rest of the world.
But never better.
 
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This week the stereo version is ready and it have to compete with my purifi 1et400a hybrid and a 813SE tube amp.

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James361 many thanks for the Vas stage design. It works great.

I am now playing with the idea to put two pairs 10n/p20 in parallel, make the supply voltage about +/- 50V. Then I hope to get 40 Vrms output. Getting 200W/ 8 ohm or 400W/ 4 ohm.

Still have to test if the use of C23 lowers distortion. And if using OPA1611(on adapter) lowers distortion.
Now I used LME49710 (TO99).
 
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