OK! My ignorance of the protocols made me ask 🙂
Did some FPGA connectivity. Missing was female headers as I don't want to solder on the EVM pins. And an i2s->toslink interface. Need to "slaughter" an old DAC build to get the Ian IO board.
One more challenge remains and it is the shielded 5 conductor cable needed to the MICs. Ideally I would like the MICs to hang freely in a string from the top and electrical connection is from the backside. But the cables with shielding and 5 conductors I have found are quite thick so it will almost be hanging in these cables rather than in the string. I ordered 5 meters of Cat7 cable with shielded pairs and a copper mesh (VERY thin 10%?) - WOW... is this stiff (solid pure copper leads used) - I could easily skip the hanger and just have the MIC mounted on this cable, position the mic by bending the cable and the mic would stay in the position forever. Tricky...
See if I can get the FPGA to play tomorrow - changing my travel plan a bit 🙂
How do I operate the switch Marcel - is it read at power on, or?
//
Did some FPGA connectivity. Missing was female headers as I don't want to solder on the EVM pins. And an i2s->toslink interface. Need to "slaughter" an old DAC build to get the Ian IO board.
One more challenge remains and it is the shielded 5 conductor cable needed to the MICs. Ideally I would like the MICs to hang freely in a string from the top and electrical connection is from the backside. But the cables with shielding and 5 conductors I have found are quite thick so it will almost be hanging in these cables rather than in the string. I ordered 5 meters of Cat7 cable with shielded pairs and a copper mesh (VERY thin 10%?) - WOW... is this stiff (solid pure copper leads used) - I could easily skip the hanger and just have the MIC mounted on this cable, position the mic by bending the cable and the mic would stay in the position forever. Tricky...
See if I can get the FPGA to play tomorrow - changing my travel plan a bit 🙂
How do I operate the switch Marcel - is it read at power on, or?
//
Attachments
Last edited:
If things work as intended, then the switch is read continuously. I'd recommend setting it to a non-zero cut-off frequency while everything is warming up. When everything is warmed up, you can either leave it at a non-zero cut-off frequency or switch it to zero cut-off frequency / autocalibration.
NET "hpsel[3]" LOC = P138; // L4P_0, SV2 pin 41
NET "hpsel[2]" LOC = P140; // L3P_0, SV2 pin 39
NET "hpsel[1]" LOC = P142; // L2P_0, SV2 pin 37
NET "hpsel[0]" LOC = P144; // L1P_0, SV2 pin 35
hpsel[0] low, rest open: 0 Hz except during the first few seconds (autocalibration mode)
hpsel[1] low, rest open: 1.2 Hz cut-off at 88.2 kHz sample rate
hpsel[2] low, rest open: 4.8 Hz cut-off at 88.2 kHz sample rate
hpsel[3] low, rest open: 9.7 Hz cut-off at 88.2 kHz sample rate
Any other combination: 1.2 Hz cut-off at 88.2 kHz sample rate
The higher cut-off frequencies, 4.8 Hz and 9.7 Hz, are meant for when there is a source of subsonics, like a draught in the recording venue.
Did you use the .bin file of post #251, not the earlier one with several bugs? (Just checking.)
Don't switch the sample rate on the fly, as it might cause the FPGA module to go into a nonfunctional state until you power it down and up again.
NET "hpsel[3]" LOC = P138; // L4P_0, SV2 pin 41
NET "hpsel[2]" LOC = P140; // L3P_0, SV2 pin 39
NET "hpsel[1]" LOC = P142; // L2P_0, SV2 pin 37
NET "hpsel[0]" LOC = P144; // L1P_0, SV2 pin 35
hpsel[0] low, rest open: 0 Hz except during the first few seconds (autocalibration mode)
hpsel[1] low, rest open: 1.2 Hz cut-off at 88.2 kHz sample rate
hpsel[2] low, rest open: 4.8 Hz cut-off at 88.2 kHz sample rate
hpsel[3] low, rest open: 9.7 Hz cut-off at 88.2 kHz sample rate
Any other combination: 1.2 Hz cut-off at 88.2 kHz sample rate
The higher cut-off frequencies, 4.8 Hz and 9.7 Hz, are meant for when there is a source of subsonics, like a draught in the recording venue.
Did you use the .bin file of post #251, not the earlier one with several bugs? (Just checking.)
Don't switch the sample rate on the fly, as it might cause the FPGA module to go into a nonfunctional state until you power it down and up again.
Last edited:
Cool!
Please say something more about the auto-cal? Is it like a digital servo?
How long do you think a varm up phase is - 10 minutes?
I'll check which one version again - thanks!
Very good to have a "humpff-swooosh" filter!
//
Please say something more about the auto-cal? Is it like a digital servo?
How long do you think a varm up phase is - 10 minutes?
I'll check which one version again - thanks!
Very good to have a "humpff-swooosh" filter!
//
I haven't a clue how long warming up will take, but my wild guess would also be a few minutes. The only thing that goes wrong when you switch to autocalibration too early is that there will be a residual offset in the recording that slowly drifts.
The autocalibration just sets the bandwidth of the high-pass to 0 Hz, thereby freezing the correction for the offset. When you power up the FPGA with the switch already set to autocalibration, it first works in the 1.2 Hz mode for a few seconds and then switches to 0 Hz. At least most of the offset will then still be suppressed.
The IIR high-pass filter is indeed a digital offset servo loop. The autocalibration mode fixes its integrator / accumulator states.
The autocalibration just sets the bandwidth of the high-pass to 0 Hz, thereby freezing the correction for the offset. When you power up the FPGA with the switch already set to autocalibration, it first works in the 1.2 Hz mode for a few seconds and then switches to 0 Hz. At least most of the offset will then still be suppressed.
The IIR high-pass filter is indeed a digital offset servo loop. The autocalibration mode fixes its integrator / accumulator states.
Last edited:
It's weird that the -) has decreased that much. The +) depends on a JFET gate that gets biased by junction leakage currents, it could need some time to settle.
Yes - I saw a change by the seconds of s 0,1V
Maybe I should leave it on for a bit without diod..?
//
Maybe I should leave it on for a bit without diod..?
//
But please note my wrong statement this morning about the + and - reading!!! See #387 for a correct comparsion!
//
//
This morning it was
+ side: 2,01V
- side: 2,97V
The + side should be related to the microphone and the - side to the diode stack.
Assuming they were swapped this morning, the diode-related side varies from 1.3 V to 2.01 V with diode and is 1.4 V without diode.
Assuming they were correct this morning and are swapped now, the diode-related side varies from 1.3 V to 2.97 V with diode and is 1.4 V without diode.
I don't get it. Does it help to connect a resistor (1 kohm...10 kohm) in series with your meter? Maybe the cable and meter capacitance causes oscillations that disturb the bias point.
Last edited:
No, if you dont solder the + from mic to the - input one the EVM and make the most to confuse yourself :O
Really sorry for my slopiness. Disregard morning meas!
//
Ignoring this morning's measurement, I still don't understand why shorting a diode has more impact on the + (microphone) than on the - (diode stack) side.
Marcel - I see now what I did:
Probably made 2 misstakes:
+/-
and
after / before the OP-amp on the EVM.
There are 3 measuring points/pins going in to the ADC (+/0/-) - there is a attenuation there. I used these now for the latest measurements in both cases; with and without diods.
This morning, out from the Mic.
Really sorry - is getting tired here I suppose... 🙂
//
Probably made 2 misstakes:
+/-
and
after / before the OP-amp on the EVM.
There are 3 measuring points/pins going in to the ADC (+/0/-) - there is a attenuation there. I used these now for the latest measurements in both cases; with and without diods.
This morning, out from the Mic.
Really sorry - is getting tired here I suppose... 🙂
//