This is serious work.
However, may I suggest that you fell into the "overdesign, overcomplicate, ridiculously overdeliver" trap? What you show are excellent power supplies, but for what purpose?
The lowest PSRR on TDA1541 is -15V (or in my redefinition +VA - AGND) at (per datasheet) -58dB or ~800.
So if we just use an optimised TL431 plus boost transistor, we get 20uF noise and from that 25nV contribution to the TDA1541 output noise at 2V 0dBFS. With 110dB SNR the noise contributed by TDA1541 is ~6uV. So from a viewpoint of noise, TL431 or any 3-Pin series regulator is fine.
But what about noise induced jitter!?
Well, nothing really.
Internally everything is differential, so logic thresholds are not affected by power rail noise in any meaningful way, the way they are with CMOS IC's.
The inputs are PNP Differential Pairs with a CCS tail and biased with 2 Diodes from DGND. So as long as there is no noise between source and DGND (easy to ensure) we have no worries.
The key issue is the reaction of these power supplies to circulating currents.
Any Grundig, Philips or Marantz (and even Arcam BB) feature 4.7-15R resistors (or high DCR chokes) and 47uF or bigger decoupling capacitors that force high frequencies (> ~340Hz) is confined to local loops.
The solution to local circulating currents is to optimise the current loops in the first place. If not, I will post something later on that account for the main audio current loop. What remains we can deal with a "zener chain" build from suitable shunt regulators.
The most relevant currents remaining after we return high frequency and power supply HF noise to -15V are the analogue output currents, hopefully already free of with dramatically attenuated glitches.
This is an inverted mono mix audio current of 8mA P-P on +5V and the audio signal currents themselves. Unless we explicitly return the signal currents to +5V current loops close via the power supplies.
Detailed tests and sim's on TL431, quite vintage.
TNT-Audio Simple Voltage Regulators Part 2.2: Output Impedance (TL 431)
A TL431 plus boost transistor
will give ~ 30mOhm at 50mA below 40kHz.
If we have 3 such regulators in series, we get < 0.1 Ohm Impedance, 35uV total noise (+5V to -15V).
Presuming AOL/AOR return to AGND, the 8mA P-P current on +5V flow through the +5V sunt at ~0.03 Ohm, creating a 240uV P-P audio signal related error voltage. According to the datasheet +5V has 76dB (> 6k) PSRR, so 38nV of this end up in the audio output IF we do not cancel this current.
The nodes "below" AGND do not see appreciable AC current from this, as I(aol) + I(aor) + I(ac5V) ~= 0.
I already presented the "simple TDA1541 Power Supply" in this thread, so allow me to introduce the "A little less simple TDA1541 Power Supply":
Note, I do not claim that it superior to what you show, it is not.
It is also not automatically appropriate for other circuits.
It's absolutely not universal, but specific to a single TDA1541 and only TDA1541 and nothing else (let g*d be your judge).
But it's much simpler than what you show and "more than good enough" to power TDA1541. And it is TDA1541 ONLY. Do NOT power ANYTHING ELSE here, except ECL level translators and re-clockers (though a separate power for these is still recommended).
Dual TDA1541 could be powered with TO220 boost transistors and increased current.
The 1,200uF are 11mOhm ESR Os-Con's (in other words the lowest impedance capacitors to be found) leading to a turnover of ~4.5kHz against the ESR of the boosted TL431 regulator and reaches it's own above ~12kHz being low impedance up to at least ~300kHz. Add local decoupling at the TDA1541 Pin's, we are good.
If more elaborate, lower noise/impedance etc. power supplies improve the subjective result I would suggest that we have layout issues etc. or subject to autosuggestion (we ourselves are the easiest to fool):
Technical University Dresden - Chair of Cognitive and Clinical Neuroscience - We hear what we expect to hear
I would suggest:
- Input signal conditioning using PECL IC's
- I/U conversion with up to 2V RMS direct out and +5V rail DAC current cancellation
- Power supply (at the minimum the shunt part)
- Optionally IIS2SIM conversion
- Optionally Clocks and power supplies
- Footprint for Amanero or cheap chinese clowns there of
- SPDIF receiver - CS8416 in HW mode - consider using async reclocking with the crystal clocks on board
Hi,
Why not a red led (LH-8000 iirc for the +/-5V or BZX84C-16 for -15V ?) in spite of the LM317 ? The 1200 uF at output, overkill ?
At LinearAudio magazine, the LM317 based reg ended at the less musical reg.... sorry I haven't the linl, it was a pdf ! @grunf shhould have it as he linked it while chosen WG super reg topology..
Btw, has the digtal front end supply (attenuation and streamer) tigther spec on PSRR and CMR ?
If a good clock, still the need to use the Masterclock output or the BCK made quiet is good enough for DEM Sync (taking the BCK there). With 32 FS of Sim mode, should the BCK speed divided by two for the DEM Sync pins (BCK/8 ?) ?
Why not a red led (LH-8000 iirc for the +/-5V or BZX84C-16 for -15V ?) in spite of the LM317 ? The 1200 uF at output, overkill ?
At LinearAudio magazine, the LM317 based reg ended at the less musical reg.... sorry I haven't the linl, it was a pdf ! @grunf shhould have it as he linked it while chosen WG super reg topology..
Btw, has the digtal front end supply (attenuation and streamer) tigther spec on PSRR and CMR ?
If a good clock, still the need to use the Masterclock output or the BCK made quiet is good enough for DEM Sync (taking the BCK there). With 32 FS of Sim mode, should the BCK speed divided by two for the DEM Sync pins (BCK/8 ?) ?
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Because "red led" is not a reliable specification, is not stable with temperature.
What advantage do you perceive for a red led, other than poorly defined specification, thermal drift and light sensitivity?
TL431 is thermally compensated and a "reliable specification", no matter which maker or subversion, they all work always out of the box.
No, it's a standard Os-Con style which gives ~10mOhm 100kHz-300kHz and forms a 36uS (4.42kHz) pole with the impedance of the boosted TL431.
The boosted TL431 + Os-Con in the 5V branches for example as around 66mOhm "ESR" (Equivalent Series Resistance) at DC, falling to ~33mOhm above 8Hz and then falls further towards 11mOhm at 60kHz to 300kHz.
It means at high frequencies where the limited speed of the TL431 starts showing up the Os-Con dominates the supply rail impedance.
I do not use LM317 in the traditional sense as regulator. It has minimal if any effect on the power supply output.
Any "super regulator" is a concrete expression of muddy thinking. So to speak a concretion of mental mud.
It creates an overly complex and expensive design that is never the equal in the precise application it will face of a custom designed "appropriate technology" regulator. Just an over engineered, overbuild, over specified Jack, instead of a Master.
Depends on the digital frontend obviously. On my vero board it's supercapacitors everywhere. I bought them in Bags from the Elna factory in Thailand.
This together with TL431 (no extra parts except for 3.3V supplies) determined noise, which is 2.7uV for 3.3V and 3.8uV for 5V (20kHz BW).
Otherwise it is down to doing an analysis of the circuit and giving the circuit a PSU that suits it's needs.
Obviously, ECL, Schottky TTL and CMOS have radically different requirements.
The whole "one size fits all super regulator to use everywhere" is idiotic.
If it is a little jittery, it will be mostly uncorrelated and resolves into noise that is killed by the DEM filter capacitors. The whole point of DEM is about "averages". Uncorrelated jitter is averaged out.
Note, BCK is that of the I2S source (almost always 64 X FS) and not the BCK supplied to the TDA1541.
No and I hope the China CPLD does not use that style, it's actually a "bad idea" for an optimised system.
It is better to use 16 X WCK as BCK in simultaneous mode, it run's everything at lower frequencies.
Thor
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Wow, since 2006 and 460 pages of TDA1541. TDA lives!
I felt compelled to comment something, since I also aseembled something with these dinosaurs.
I believe the Thorsten poins is about the inherent relatively interesting PSRR of the TDA1541, ie, not being overly fussy about the PSU. Yet, is taken from granted to use the stacked shunt regs, to control the decoder current path. And shunts behaves well with low ESR caps.
Even knowing all about it, I made myself low voltage low noise Zener based shunt PSU's for my own incarnation of the TDA. Since sometimes we make something because we can 😉
Is plenty possible to discern the differences about these PSU's analyzing it's output with a FFT like the ARTA. Some regs make noise visible into a simple 'scopes (like the LM317 ones).
But, for the TDA output, I not registered differences about the TL431 vs the low noise shunt (the TDA remains pretty quiet anyway), but I leaved it as-is, for now at least. In any case, is perfectly visible if eg. the ARTA sine generator have dither for 16bits or if is truncated.
My implementation of the TDA1541 is one visibly shameful messy thing. But works good and sounds good. Since I'm simply "glued" things I have accumulated from last 20 years, and felt I can make something with it. But full attention is paid for the PSU routing, for example.
My goal was to use the TDA1541 with oversampling in the PC, so it is a NOS affair.
It have even a selenium rectifier for one of it's rails 🤣 , and germanium rectifier for the heaters.
Needing to finish the input/output connections and tidy some things.
I have used attenuators for the input of TDA1541, and the output is somewhat inspired in one of Grunf: the grounded grid. But with different tubes/valves. This is great to add a CLC ultrasonic filter in between, due to defined low impedance.
The TDA1541 board is a 2 layer "homemade" I made in pehaps 2010. Since it not have originally shunt regs or attenuators, I needed to side add it and progressively becomes a mess...
This will be far from the ultimate TDA1541 implementation in the world, since it lacks the DEM external clocking, for example.
Well, some time after building it, I built something very different, not even being multibit decoder: https://www.diyaudio.com/community/threads/valve-dac-from-linear-audio-volume-13.308860/page-108 with excellent results.
I felt compelled to comment something, since I also aseembled something with these dinosaurs.
I believe the Thorsten poins is about the inherent relatively interesting PSRR of the TDA1541, ie, not being overly fussy about the PSU. Yet, is taken from granted to use the stacked shunt regs, to control the decoder current path. And shunts behaves well with low ESR caps.
Even knowing all about it, I made myself low voltage low noise Zener based shunt PSU's for my own incarnation of the TDA. Since sometimes we make something because we can 😉
Is plenty possible to discern the differences about these PSU's analyzing it's output with a FFT like the ARTA. Some regs make noise visible into a simple 'scopes (like the LM317 ones).
But, for the TDA output, I not registered differences about the TL431 vs the low noise shunt (the TDA remains pretty quiet anyway), but I leaved it as-is, for now at least. In any case, is perfectly visible if eg. the ARTA sine generator have dither for 16bits or if is truncated.
My implementation of the TDA1541 is one visibly shameful messy thing. But works good and sounds good. Since I'm simply "glued" things I have accumulated from last 20 years, and felt I can make something with it. But full attention is paid for the PSU routing, for example.
My goal was to use the TDA1541 with oversampling in the PC, so it is a NOS affair.
It have even a selenium rectifier for one of it's rails 🤣 , and germanium rectifier for the heaters.
Needing to finish the input/output connections and tidy some things.
I have used attenuators for the input of TDA1541, and the output is somewhat inspired in one of Grunf: the grounded grid. But with different tubes/valves. This is great to add a CLC ultrasonic filter in between, due to defined low impedance.
The TDA1541 board is a 2 layer "homemade" I made in pehaps 2010. Since it not have originally shunt regs or attenuators, I needed to side add it and progressively becomes a mess...
This will be far from the ultimate TDA1541 implementation in the world, since it lacks the DEM external clocking, for example.
Well, some time after building it, I built something very different, not even being multibit decoder: https://www.diyaudio.com/community/threads/valve-dac-from-linear-audio-volume-13.308860/page-108 with excellent results.
470 pF as Cdem is ok 🙂 https://www.audialonline.com/community/topic/tda1541a-dem-clocking/
At least you used stop clock 15 bits simultaneous from Iancanada(I did too).
Are the tubes 5899A pentodes ?
At least you used stop clock 15 bits simultaneous from Iancanada(I did too).
Are the tubes 5899A pentodes ?
Interesting, I'm using 470pF. 🙂
Yes, they are semi-remote cutoff pentodes. I use them for the CCS loading of the follower stage (for playing with a tube CCS). For this function, is ok to be a remote cutoff.
2 tubes are the 5899, and the other are the soviet 6N18B-V.
TBH out there have some more linear tubes, but for now I choose them, and they are surprisingly low noise. In the future I can change the gain stage one if I want to play with.
Yes, they are semi-remote cutoff pentodes. I use them for the CCS loading of the follower stage (for playing with a tube CCS). For this function, is ok to be a remote cutoff.
2 tubes are the 5899, and the other are the soviet 6N18B-V.
TBH out there have some more linear tubes, but for now I choose them, and they are surprisingly low noise. In the future I can change the gain stage one if I want to play with.
In my estimation, one additional shunt on top of the +5 solves this problem. The current conveyor is then used, along with I/V resistor tied directly to the most positive voltage. This voltage is also the "common" for the analog output (this will attenuate strongly the noise from this top shunt). With this arrangement, the +5 shunt does not see the audio current, only the top shunt does. It is similar I believe to what has already been posted by Thorsten a few pages back (I think it's a good option).
Of course, if a low output is enough, the simplest way is just use the conveyor directly to +5 as already discussed.
Another way to return the variable audio current to the +5 and thus "bypass" the +5 reg uses a current conveyor that is folded, which will allow 2V output. I posted it in this thread a while back. I will dig it later. EDIT: https://www.diyaudio.com/community/...ate-nos-dac-using-tda1541a.79452/post-6986368
(This uses input servo at full-bandwidth to keep the TDA out pin at 0V even during fast transitions.)
BTW, I'd like to participate in the group.
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If you don't like it, one alternative is differential output as suggested by Thorsten. This will cancel out noise of the regulator.
https://www.diyaudio.com/community/...ate-nos-dac-using-tda1541a.79452/post-7757526
https://www.diyaudio.com/community/...ate-nos-dac-using-tda1541a.79452/post-7757526
My question is just what it is, as I do not understand in the shematics if the Agnd is now the +5V as I also see +5V !
So if the signal is returning to +5V, then you connect the gnd body of the RCA (or symetric plug gn pin) to the +5V layer ? Means a cap somewhere ? Or must the gnd chinch pin be connected to the new Agnd (aka old -15V pin15) and from there it flows to the pin 28 which is decoupled from pin 15 by 0.1 uF
Sorry, just a basic question at understanding the new routing whatever the shematic one is proposing.
So if the signal is returning to +5V, then you connect the gnd body of the RCA (or symetric plug gn pin) to the +5V layer ? Means a cap somewhere ? Or must the gnd chinch pin be connected to the new Agnd (aka old -15V pin15) and from there it flows to the pin 28 which is decoupled from pin 15 by 0.1 uF
Sorry, just a basic question at understanding the new routing whatever the shematic one is proposing.
No.
However it is vitally important to remember "There is NO GROUND". Ground is a conspiracy theory by Flat Earthers, Inner Earth Agartha Proponents and UFOlogists. THERE IS NO GROUND.
It's just a signal and or power line that someone labelled "ground" instead of "cold" or "Vanilla Ice" or "do not lick" or any other label.
There was some really, really awful music in the 90's.
You need to figure this out.
Yes, this is ONE OPTION if using the low output I/U conversion returned to +5V :
Tube Grid to bottom of 250R I/U resistor, Cathode to +5V. This gives -2V Bias and 1V P-P signal, pick a suitable tube
Tube Anode resistor to + B which in turn has it's negative line connected to +5V
Tube Anode via coupling capacitor to RCA Center, 100k RCA Center to +5V
RCA Shell to +5V
Either USB and SPDIF input or the I2S feed to TDA1541 etc. need isolating, as +5V is now in effective Tube and output signal "ground". So we do not want to short circuit +5V and DGND through external connections.
Thor
Nope. It goes wherever you need it to to complete the output signal current loop.
Currents flow in loops. It returns there through anything in series with it.
Thor
so it returns to each AoL and AoR pin ? But needs a support (layer) to flow back on which is connected the gnd pin of the RCA plug.
Question remains, how to connect the return signal of the pre or amp to those pins, or which layer ?
There is no ground, okay, but where flows the return current loop, aka labelled gnd pin of the RCA where the signal current return to its source from the pre/amp ? One need to know where each current flow back to avoid crosstalks,no ? That's the sense of having more layer or at least areas (digital, PS, analog) ?
I am talking of the BJT I/V from you or Zorant (let forget the tubes for now please ofr my basic understanding).
The second layer is "AGND" reference analog layer (plus the top islands pours for the 14DEM) : at which pin of the TDA do you connect this AGNDs layers (so not the pin 15 now) I am lost , sorry. No reference layer somewhere ?
Pins where relabelled, it is just to add decoupling but in fact +/-5V and -15V oins remains the same for the external power supply ?
pin 28 = still +5V and two decoupling as both agnd/dgnd return path (0.1 uF to new-15V pin and 0.1 uF to pin 26 (old -5V)
pin 15 : only new AGND (or also still -15V) ?
pin 14v : new -5V : decoupled two both pin 15 and 26
pin 26 : new DGND
pin 5 : new -15V 'or still Vref layer for the AoL/AoR - and return path, aka gnd pin of the RCA.
Are we all focusing on the same thing : you, Zoran, and others ? Or I simply don't get it. I need to know to avoid short in the pcb
Idem for the digital frontend : gnd plugs of uf-l, etc connections are going to pin 26 (DGND logic layer) ?
? I appologise, better to repeat than to destroy a chip. I do use for clarity : the number of the pin, the usual label (for illustratiuon : old-Agnd for pin 5 and your new labbeling with for iullustration : new-agnd = pin 15. A little like what you did for pins decoupling in order of appearance.
Question remains, how to connect the return signal of the pre or amp to those pins, or which layer ?
There is no ground, okay, but where flows the return current loop, aka labelled gnd pin of the RCA where the signal current return to its source from the pre/amp ? One need to know where each current flow back to avoid crosstalks,no ? That's the sense of having more layer or at least areas (digital, PS, analog) ?
I am talking of the BJT I/V from you or Zorant (let forget the tubes for now please ofr my basic understanding).
The second layer is "AGND" reference analog layer (plus the top islands pours for the 14DEM) : at which pin of the TDA do you connect this AGNDs layers (so not the pin 15 now) I am lost , sorry. No reference layer somewhere ?
Pins where relabelled, it is just to add decoupling but in fact +/-5V and -15V oins remains the same for the external power supply ?
pin 28 = still +5V and two decoupling as both agnd/dgnd return path (0.1 uF to new-15V pin and 0.1 uF to pin 26 (old -5V)
pin 15 : only new AGND (or also still -15V) ?
pin 14v : new -5V : decoupled two both pin 15 and 26
pin 26 : new DGND
pin 5 : new -15V 'or still Vref layer for the AoL/AoR - and return path, aka gnd pin of the RCA.
Are we all focusing on the same thing : you, Zoran, and others ? Or I simply don't get it. I need to know to avoid short in the pcb
Idem for the digital frontend : gnd plugs of uf-l, etc connections are going to pin 26 (DGND logic layer) ?
? I appologise, better to repeat than to destroy a chip. I do use for clarity : the number of the pin, the usual label (for illustratiuon : old-Agnd for pin 5 and your new labbeling with for iullustration : new-agnd = pin 15. A little like what you did for pins decoupling in order of appearance.
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Ok, but we force it to flow on a substrate, be it a wire or a layer to allow it flow back alone whatever it is straigth and the least resistance path (least impedance/inductance at high frequencies) ? we even sometimes avoid ground pours to avoid coupling or it flows rigthh tot he core substrate too (FR4 etc, w/o metalic substrate around) ?
I mean when making a pcb, one needs to think of things connected to a "NET".
for illustration, looking at tonixmp pcb just above I just see currents crossing signal paths and power lines everywhere (be it the old-labelling or not) ?
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Question is , why don't you produce an schématic understandable for them all of your " ideas " , it will be worth thousand of words , and I dont speak for myself as I retain , no offens , your new "ideas" useless for the job
this is what John use to do at the time when he introduce his new ideas , and it was useful to read them , thanks to him 🙂
.
That is one way. Say stack another 10V shunt on top of the +5V and we get +/-15V centred around AGND and the current returns via the shunt from +15V to +5V and from +5V as DC to -15V.
But what if we figure we already have 20V DC available and that's enough?
And we do not want avoidable signal current flowing in regulators?
Or if we want 2V RMS, go to the -15V rail and use the Shunt chain (or my chain of super capacitors) to return the current from +5V.
Interesting.
I was going to put this into a separate post.
I decided my orginal current conveyor to -15V (Idea credit to @Zoran) was ok, but the balanced out was sh!t. A bad idea. A case of muddy thinking. Pursuing simplicity past where it should be abandoned.
So, as Wiley E Coyote sez:
So, that's the current drawing board:
Rather than lumping too many jobs into a single circuit, every function is separated out.
The previously described SXST compound transistor makes appearance, as does the Sziklai Pair.
The output Buffer/Lowpass is basically straight outa Compton, ooops, out of the Arcam Black Box:
The phase inverter is a split load type using SXST with the Cathode/Emitter output unused.
The trick to cancel the 8mA P-P signal current into the +5V rail is the circuit in the middle around T1X. It simply the DAC current back to +5V and draws it away from -15V.
So power supply impedance matters a lot less.
Thor
No, it passes AoL and AoR.
It is basically a pair of fancy 4mA current sinks that split into 2 X 2mA, one of the 2mA currents is drawn from +5V and the other 2mA from AoL/AoR.
The fancy current sinks are modulated in opposite directions, so the sum off all currents is ALWAYS 4mA DC.
You connect an RCA plug to TDA1541?
Depends on the precise arrangement of power supplies and audio circuitry, it is not directly related to TDA1541.
On TDA1541 you can declare any of these Pin's as "analogue common":
+5V
AGND
-15V
You must then return the AoL/AoR and +5V signal currents to "analogue common" pin.
In the "cold" signal conductor, of course.
Rethink this as not "ground" but one of pair of signal conductors with opposite polarity.
Of course. Not just crosstalk. One needs to know where current flows.
But as a rule the output from the TDA1541 is not directly connected to other equipment, so it simply does not enter the question difectly.
Reference to what?
As I pointed out before, the "common" pin for the current sink circuitry is -15V with AGND pin forming in effect the positive supply.
And +5V is actually the "ground" for the CML/ECL circuitry with DGND acting as negative supply to this logic.
So:
Analogue pins:
-15V Pin function => analogue common
AGND Pin function => analogue supply
AoL/AoR Pin function => analogue signal current input
+5V Pin function => analogue signal current input
Internal Logic digital pins:
+5V Pin function => logic common
DGND Pin function => logic supply (-5V re Logic Common)
External Logic digital pins:
DGND Pin function => input common/reference
LE/BCK/DR/DL Pin function => input pins
Note input signal should be ~250...400mB PP centred around ~1.25...1.3V with reference to DGND.
The issue is now that the "common" pins that also form the current return for at least half the signal current are on +5V & -15V, not AGND & DGND.
In Schematics I use the actual IC pin labels, not the functional labels. So AGND means AGND Pin on TDA1541 etc.
Remember the Mantra:
"There is no ground"
Remember the Mantra:
"There is no ground"
Remember the Mantra:
"There is no ground"
And no, actual logic ground for the logic inside the TDA1541 is Pin 28.
I feel you are not thinking about how the circuit works. What functions are. You want want "gounds" so you can connect all rounds together etc.
You first need to overcome this thinking.
Remember the Mantra:
Also:
Also:
Also:
Remember the mantra?
Because most people think like you do (engineers included) the Pin's on the TDA1541 are labelled the way they are.
Perhaps abandoning "GND" labels entierly and simply labelling for power wire pairs etc. would be easier.
If only Philips would have used a bigger case with extra pins for:
AoL bang / AoR bang (inverted current on separate pins, not +5V)
Din Ref (Digital input reference voltage)
The explain how the various pin pairs connect.
E.g -5V ECL needs to be at the same potential as +15V Analogue. Never ever talk about "ground"
Thor