Building the ultimate NOS DAC using TDA1541A

And the intended analogue stage circuit (one channel):

1725365858833.png
Hi Thorsten, in your schematic the capacitors c4 and c7 are shown as non-polarised. Unfortunately non-polarised capacitors of this capacity are large and expensive. Do you think they can be replaced with electrolytics without too much of a performance penalty?
Is OGND derived from AGND by paralleling a 3mH inductor and a 100 ohm resistor as shown in post #9243?
 
Hi! I would like to obtain the best DEM clock for my TDA1541 DAC in SIM mode get from CPLD by Miro code.
Strangely i have measured 1,536Mhz bck on pin 2.
Please can you show me how i can do to get best resultate?
Thanks
Antonio
# I2S-simultaneous-TDA1541A
VHDL code for converting standard I2S data (64fs) to the offset-binary data (simultaneous) needed for TDA1541A DAC

  • "I2S 2x32=64-bit = 64fs" to "16-bit offset-binary" (simultaneous) with inverted MSB and stop-clocked BCK) for TDA1541A DAC (stereo) without the use of MCLK (= even less digital work)
  • basic data synchronization is incorporated on LRCK signal

Miro's Description

You can open VHD file with Notepad++ and changing this code :

if (cntOB = 17) AND (inLRCK = '0') then -- LE pulse duration (4 BCK)
leFlag <= '1';
elsif (cntOB >= 21) then
leFlag <= '0';
end if;

to

if (cntOB = 17) AND (inLRCK = '0') then -- LE pulse duration (10 BCK)
leFlag <= '1';
elsif (cntOB >= 28) then
leFlag <= '0';
end if;
 
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Hi Thorsten, in your schematic the capacitors c4 and c7 are shown as non-polarised.

C4/6 on this schematic actually.

Nippon Chemicon UES series are not large or expensive and measured close to film capacitors.

Is OGND derived from AGND by paralleling a 3mH inductor and a 100 ohm resistor as shown in post #9243?

Conventionally OGND would use the analogue stage ground.

It may however be preferred at another circuit node (e.g. -15V or +5V and that.needs testing.

Thor
 
There are no exotic parts, very simple and straight-forward design, with attention paid where it matters most.
I really don't see how or what can be further improved on the design.

I am not sure if it will fully resolve 16 bits, but that's not the objective of the thread here.



Thumbs up and a lot of thanks to 👍@ThorstenL for kindly sharing this timeless design.
Good luck.
 
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I like the modularity in this design, i.e. separating the power supply, the digital part and the analog part. This way there is room for experimenting with various PSU solutions (e.g. battery, shunt regulator, LM317, capacitor multiplier, ...), various I/V options (Thor's design, Lampizator, transformer, AD811, opamps, ...). There are many ways to Nirvana 😏
I start it with modifying an already pretty good CD player, where it is not practical to implement all tricks. But it is easy to add the digital lines attenuator, the DEM oscillator mod, upgrade the DEM filter capacitors, do this and that around the I/V converter opamp (including trying various types), replace the output coupling capacitors for better, put on a heatsink. It won't be "ultimate", that would need a standalone DAC (and much time).
 
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modifying a solid player.

A few notes. Instead of full attenuators simple series resistors (~ 1.2kOhm) are ok if the source is SAA7220. If using SAA7220, add "Grundig" DEM Reclock. This is quite simple.

If the SAA7220 is removed I recommend making a small socket & PCB's adapter with the 74F74 or 74LVC74 (with 2.7V supply) reclock and flying attenuators. Add the Clock divider with an additional 74XX74 and a 74HC4020. While diode clippers work ok, I want to avoid them as whenever the diodes "clip" the waveform we have relative high dynamic currents flowing.

Decoupling has been discussed a lot.

I would wrap the IC into self adhesive copper tape linked to DGND. Then place all "digital" decoupling there. To wit, 100nF/1206/C0G from +5V/-5V & -15V to DGND, added 100nF from +5V to -5V. These will be very flat, so the IC will still fit into a standard socket. Add heatsinks.

In a pinch we can avoid having a separate ground plane and terminate all DEM Capacitors etc. into the DGND plane, but I prefer to have these planes separate.

So under the PCB where we now have socket pin's sticking up, we add kapton tape (self adheasive) to ensure no shorts, then a layer of copper foil linked to AGND and DGND pins (this copper foil and kapton tape is like making papercutouts as kid).

Add all the analogue decoupling capacitors under the PCB, between the pin's soldered to the AGND copper plane.

Have ~ 1,000uF Os-Con for the SAA7220 if you keep it, with a choke isolating it from +5V. The 3-pin 78XX/79XX regulators commonly found in the power supplies of CD-Players are likely ok. Improving the likely old PSU Cap's (bigger value, low ESR) is recommended. The final large value supply capacitors around TDA1541 should also be 1,000uF Os-Con.

For the I/U conversion WITH SAA7220 I would suggest something like this:

1734360462799.png

1734360555649.png


The OPA620SG is just a cool looking, hot running antique Video Op-Amp in folded cascode with a flat 60dB open loop gain to past 100kHz. Chinese vendors have a lot of equipment pulls that look genuine, Power supplies are +/-5V max (so this is NOT a "universal replacement") and one Op-Amp draws 21mA. The actual circuit is very simple (see below).

Any sufficiently low noise and fast Op-Amp can be used. If you want to use a current feedback type, sure, but make sure to keep them stable. FET OPA's should be ok, but here is one place where bipolars do well.

How low noise? The 750R I/U conversion resistor contributes ~ 3.5nV|/Hz so super low noise OPA are
1734360705433.png
not needed. Note the circuit on the + in is the Nakamichi style DC offset to reduce glitch related issues.

C2/C8 set the noise gain to ~ 4 so many a decompensated Op-Amp's can be used. C8 is actually under the TDA1541, for simplicity to AGND.
The Op-Amp uses the TDA1541 +/-5V as supplies, so the signal current circularises to +5V, removing signal-dependent current modulation on =5V. The limited supply voltage means we limit the signal at the I/U conversion stage output to 1V RMS and there will be a ~1.5V DC offset.

A simple CR highpass and second order CRCR Bessel lowpass remove the DC and implement with the feedback capacitor of the I/U conversion the 40kHz 3rd order Bessel lowpass required for SAA7220B.

A Fet input Op-Amp buffers the purely passive Filter and adds 6dB gain. A SINC EQ for non-oversampling can be placed here.



For subjective sound quality reasons, if available, I would use OPA(2)604 with Class A bias (OPA2604 makes this nearly mandatory - look up the patent describing the output stage US5019789A), this will still keep distortion low.

All OPA2604/604 on e-bay & ali are fakes AFAICT BTW.

OPA1642/1652/1656 can all be used. Pick your favourite.

Thor
 
if available, I would use OPA(2)604 with Class A bias (OPA2604 makes this nearly mandatory - look up the patent describing the output stage US5019789A),

Here a simplified schematic of the OPA(2)604 Circuit. Note all J-Fet's are P-Channel while all bipolars are NPN, likely do the limitations of the higher than average voltage process.

1734374982932.png


While the output stage is quite clever and all that, giving it a pulldown current of (say) 10mA will help. A single NPN transistor and a Resistor will do a perfectly good job with base to -5V emitter via 1k to -15V and collector to OPA(2)604 output.

This of course also works for other OPA's. For arguments sake, we could use a use a NE5534 with an external J-Fet input (using JFE2140) and this pulldown CCS as output amplifier. It would likely sound pretty good.

Modern OPA with Rail to Rail outputs and/or diamond transistor output usually do not "like" class A Bias, it's worth trying though, if you do not "like" the result, very few components to remove.

As @lcsaszar has shown, implemented well, a 5534 (decompensated) can do a decent job as I/V converter. I guess with a noise gain of 4, we might add speedup capacitor to allow sufficient slew rate. Or we can add an external BJT Input, raise frontend current and up the VAS current, all of which lowers inherent distortion open loop.

Thor
 
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For subjective sound quality reasons, if available, I would use OPA(2)604 with Class A bias

1734427862970.png


Elaborated output stage for everyone who has OPA(2)604 in the junk box and wants to modify an existing CDP/DAC etc. with TDA1541 into something that sounds quite horrorshow! If you have the Metal Can versions, use them.

Upfront, scalper/equipment pull OPA620SG running of the DAC rails.

Thor
 
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Will probably leave oversampling in place, so will have to divide by a lot to get to the 150khz optimum mark.

Just use BCK? Like Grundig does... Also, @lcsaszar found 352.8/384kHz just a trifle better performing.

You can then dump the SINC correction, but you need to check the Digital Filter Response and you probably need to retune the analogue filter response.

The SAA7220B has a little build in attenuation and HF boost, to compensate for a 3rd order, 40kHz Bessel characteristic analogue lowpass, such as implemented in the analogue companion IC for TDA1541, the near mythical TDA1542.

1734429870666.png


Thor
 
Can be use this schematic in simultaneous mode ?

Not without changes.

Notes.

Delete 74AC174. Use 74AC574 instead. It makes for better layout.

For SIM Mode. the second data line needs re-clocker and attenuator.

Also, this schematic assumes the presence of a CPLD for signal routing, division etc. the nodes 174/3 & 174/6 need an opposite polarity signal of 176.4kHz...384kHz that is synchronised to the sample rate but remains constant.

Thor
 
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Hello.

I'm sure this is a question already answered in this vast thread but couldn't find it.

So, if one would use the ubiquitous NE5534 for the I/V conversion stage, would it need the addition of a compensation cap (22pF) between pins 5&8?
I tried it without the cap and it works (and sounds) fine but since this position is unity gain would it make it better (safer) to go compensated?

Kind regards,
Nikos.
 
More discrete IV convertors.
I came across Smiyj and Sedra invention printed in 1967 of IV converter circuit. Just after Wilson Current mirror circuit.
.
This IV is SIMPLE, has low number of elements, available, ca n be replaced without much harm of Q. Very good FFT, very good THD.
AND
Voltage are IN phase at the output - almost all other discrete IVs has opposite phase on the output. With these values it is about 3.1 Vp-p output whic is more than enough even without premaplifier...
.
Low Zin of 46mOhms cca. Zout depends on Riv value and Rtermination value, but generaly it cam be low.
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Two SE circuits are in the CSH PNP and NPN based.
Also these 2 circuits can be "merged" to classic PP complementary circuit.
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These values are for 2 mAp-p and without Current at the Iout dac pin. So it for the PCM56, AD1865, AD1862, and so. For PCM63 just half the value of Riv and double the value of C parallel to Riv.
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For TDA1540 and TDA1541A, increase/decrease I with Rs resistors as noted in the SCHs
.
Cheers
.
IV Smith and Sedra SCH.jpg