Building the ultimate NOS DAC using TDA1541A

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#9,621
ThorstenL said:
No point. You could also use other IC's, e.g. 7810 for the +/- 5V Digital.

They do not need to be low noise or low impedance. Just hold DC voltage steady.
Click to expand...
When I mention the Tracking preregulator, it is for minimum added parts for imroving psrr and stability?
Because the regulator is constantly in operation charging super-capacitors.
It is just one LM reg and few passive elements more.
Example at
http://www.acoustica.org.uk/t/3pin_reg_notes4.html
original from datasheet

tpr.gif

a bit improved
mc-tpr.jpg

Once I made the version with L FB at outputs of each LM. It was better than standard with one LM regulator.
 
#9,622
Zoran said:
When I mention the Tracking preregulator, it is for minimum added parts for imroving psrr and stability?
Click to expand...
I understand what the pre-regulator does, how and why.

You seem to miss my point of maximally avoiding looped feedback circuits.

Using a CRC cascade does the same job passively.

For my design with a significant CRC filtering cascade prior to the regulator and RLC filtering post regulator with sub Hz turnover and 40dBextra PSRR in the 20 Hz range the tracking pre-regulator is pointless.

Now you will say "But you could do away with a lot of the passive circuits with the tracking pre-regulator, to which I will agree and say that if that was what I wasnted, then indeed, I might do something like this.

I am not "against" this (or anything really), but it is not part of my set of goals.

Thor
 
#9,624
diyiggy said:
If one uses smd double common choke
Click to expand...

One looses all differential mode filtering, so this is not a recommended option.

1,000uH SMD power chokes exist in many catalogs, sizes and footprints are pretty uniform.

The largest physical size units are usually appx 12mm X 12mm with varying hight. Most of those chokes have low DCR and need extra resistors to raise DCR.

We still also have many TH options.

Thor
 
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#9,626
Zoran said:
When I mention the Tracking preregulator, it is for minimum added parts for imroving psrr and stability?
....
View attachment 1361833
Click to expand...

PS, IF I where to this soft of thing in this project, what I'd do would look more like this:

1727630961248.png


Sometimes with a FET as pass element for lower impedance where that matters. The output circuit can be adjusted and tuned for the best compromise between all relevant parameters.

Self noise of the Output Regulator is ~1.5nV |/Hz or a fraction of 1uV noise because T2 is a SMD variant of the magic 2N4401 "switching transistor". Z

It kills enough of what is on the output of the 317 to leave only the self noise.

This version here is intended for clock circuits, the very large value electrolytic capacitors are there to kill close in noise, with 0.050Hz and 0.005Hz turnover.
Many clocks do not start up clean with a slow PSU ramp, in this case add a relay on the base, to keep the base a 0V until the voltage is stable. Something like a modern 555 might answer the purpose adequately.

However, in my current application I am not size/cost constrained, so I want to keep it as passive as possible.

Thor
 
#9,627
lcsaszar said:
@diyiggy : ...........................................................
The half bit or 1/2 LSB precision meaning is something else. The LSB is the Least Significant Bit, in PCM representation it is 0000 0000 0000 0001 or in hex 0x0001. This is the smallest change what the code is able to resolve. It has an analog equivalent, that is for the TDA1541 it is 61 nA. On 1.5 kohm I/V resistor (data sheet opamp converter) it is 90 uV.
All bits individually should have < 1/2 LSB current precision, because the final analog output will be made of the combination af all bit current (or the lack thereof). If for example the MSB that has -2 mA contribution to the analog output, deviates by + or - 61 nA, then our actual LSB current that is 61 nA will be meaningless, and our resolution will be only 15 bits or less. If these errors of individual bit add up, or even worse some bit errors are positive, others negative, then linearity is lost. This error is DNL (Differential Non Linearity). If we consider the cumulative DNL of all 16 bits we get INL (Integral Non Linearity) that is directly related to THD what we can measure.
Click to expand...
Only for a little amusing, if it makes sense: 61nA. Even for silicon from this era, is not a super high value that the leakages not plays some havoc, at least for extreme temperatures, perhaps. Of course, our DIY cautions for a great DAC includes the TDA located at a cold part of the equipment, or using with a fan (for the enclosure) or heatsink if it's unavoidable, so we cannot arrives in the zone where the leakage becomes a important percent of the LSB.

MVLabs and others noticed variation caused for the DEM caps leakage (the electros for the 50Hz DEM usage), and I wonder if a TDA operating at 125°C will not arrives at same issue, or worst.

Good that our DIY usage is far from these extremes... but one wonders if it is real (I'm NOT will test it with my TDA hehe ;-)
 
#9,628
There is always a danger it sounds different not because what the designer planed buut because of a non ruled thing that really changes the sound.

As an illustration : people noticed a big copper heatsink on the TDA141A makes it singsbetter when grounded at one of the TDA gnd pin, arguing about EMI shielding, but it could be something else like the impedance of the Gnd changed by the adding copper area/weigth, and so on...

Me, I never lost a TDA1541A from 30 years but I am ok to put a heeatsink if it sounds better or change the lythic caps each time because aging they leak too much 🙂

Okay off topic, sorry !
 
#9,629
DIYBras said:
Only for a little amusing, if it makes sense: 61nA. Even for silicon from this era, is not a super high value that the leakages not plays some havoc, at least for extreme temperatures, perhaps. Of course, our DIY cautions for a great DAC includes the TDA located at a cold part of the equipment, or using with a fan (for the enclosure) or heatsink if it's unavoidable, so we cannot arrives in the zone where the leakage becomes a important percent of the LSB.
Click to expand...

Yup, keep the TDA1541's cool. Or (T)HD goes up.

Thor
 
#9,634
ThorstenL said:
I understand what the pre-regulator does, how and why.

You seem to miss my point of maximally avoiding looped feedback circuits.

Using a CRC cascade does the same job passively.

For my design with a significant CRC filtering cascade prior to the regulator and RLC filtering post regulator with sub Hz turnover and 40dBextra PSRR in the 20 Hz range the tracking pre-regulator is pointless.

Now you will say "But you could do away with a lot of the passive circuits with the tracking pre-regulator, to which I will agree and say that if that was what I wasnted, then indeed, I might do something like this.

I am not "against" this (or anything really), but it is not part of my set of goals.

Thor
Click to expand...
OK Thor, I just gave the information... I was not in the mood to criticize or something...
 
#9,635
diyiggy said:
@Zoran, hello

With flip flops, do you think the John's sim mode is the simpliest way to to it ?
Click to expand...
I think that is the good way? Not sure which version is actually build, working and eventually measured?
But it is the elegant concept with reduced elements amount.
And I think there is a version with -Data for ballanced mode.
Maybe this is OK for TDA1541A, for employ L-R segments in say -L/+L for one and same for R channel to have dual mono balanced configuration with 2 DAC chips? In that case theese diskrete IVs, can be used as -180deg phase, and with simple -DATA part will be +Analog Out (and for +DATA other 1/2 DAC will be -Analog Out
No need for "switching oposite" the loudspeaker polarty... To make the things "right"...😡
.
Disadvantage is that Johns very good idea, is only for TDA1541A chip. 🙁 Probably can be rearanged for other DACs too?
.
Because of that I tried to make it more versatile, to cover "All" old school DAC-s. (inclouding TDA1540). Even diskrete R2R parallel bits datas can be used for Diskrete DAC up to 32bit per channel in Simouuktaneous mode with stopped clock...
.
But unfortunately I didn't build the piece to test yet. (It is "working" in the sims, BUT it could be not the case of real circuit...)
 
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#9,640
J_Perkins said:
Would like to ask again, why BCK and not MCK divided down to sync to DEM (16,17).
Cheers
Click to expand...
I will try do it with MCK
Something like this with 512 x MCK
with 590 counter IC, other types is also OK
(For 1025 x MCK same topology but last counter out QH is for 176KHz)
(The inside oscilator part circuit of DEM DAC is same as Thorsten posted...)
It is with A version and external 470pF. 2 x R to -15V values for 0.2mA cca.
.
176_DEM_SCH.jpg


176_DEM.jpg
 
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