That's why it is better to use a diff stage for error-correction rather than a single transistor as in HEC. This isolates biasing from the error correction circuitry and makes the use of a pot redundant.
Hi Mike,
The pot being complained about was the pot for trimming the HEC for minimum distortion. It was not the usual bias pot.
In any case, the bias pot is still needed, but the HEC trimming pot is generally not required once the design values have been properly centered. Although a further trim to better than 1% will in principle further reduce distortion at low frequencies, like 1 kHz, it will not generally make a difference at 20 kHz because at that frequency the effectiveness of HEC is dominated by the necessary frequency compensation of the HEC circuit.
Cheers,
Bob
The trouble with the HEC circuit is it is used to bias the output devices as well aas error correction. This means adjusting bias results in a misalignment in the error correction and conversely.
Using a diff. stage for error correction with biasing set independently solves this problem.
Using a diff. stage for error correction with biasing set independently solves this problem.
The trouble with the HEC circuit is it is used to bias the output devices as well aas error correction. This means adjusting bias results in a misalignment in the error correction and conversely.
[snip].
Are you sure about this Mike? Setting the bias does change the DC conditions in the EC loop but I don't think it does change the EC conditions like gain-of-one around the EC loop and such.
jan didden
Adjusting the bias has some effect on the EC balance, but given the tolerances of all other components of say 1% each, it can be safely ignored. Besides, as Bob already pointed out, the necessary frequency compensation reduces the EC loop gain anyhow, that is, at (higher) frequencies where the error correction is most needed.
The trouble with the HEC circuit is it is used to bias the output devices as well aas error correction. This means adjusting bias results in a misalignment in the error correction and conversely.
Using a diff. stage for error correction with biasing set independently solves this problem.
Hi Mike,
The simple answer is that the interdependence, while non-zero, is very small. You just set the bias and trim the EC and you are pretty much done.
Have you done a sensitivity analysis on this circuit? If the bias is adjusted to change by 20%, by how many percent must the trim resistor be changed to bring the HEC circuit back to optimum? If the HEC resistor is changed by 1%, by how many % is the bias current changed? Its all a matter of degree.
As I said before, if the circuit is properly designed with 1% resistors and properly design-centered, there is usually no need to trim each amplifier for HEC accuracy, as very little difference will be made at 20 kHz, where it counts most, anyway. A 1% HEC trim error limits HEC distortion reduction to about 40 dB, which is quite a bit.
Can you share with us the schematic of your proposed HEC approach that uses the diff error stage and which has independent control of bias and HEC trim?
Cheers,
Bob
Are you sure about this Mike? Setting the bias does change the DC conditions in the EC loop but I don't think it does change the EC conditions like gain-of-one around the EC loop and such.
jan didden
In Hawksford's arrangement the bias resistors R3 and R4 here:
http://www.diyaudio.com/forums/soli...terview-error-correction-117.html#post1071612
are also used to set balance in error correction as explained in the above link.
I.e: if you adjust R3 and R4, then you must adjust R1 and/or R2 to compensate.
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Can you share with us the schematic of your proposed HEC approach that uses the diff error stage and which has independent control of bias and HEC trim?
It's a family of circuits.....need to publish first.
Note that HEC here:
http://www.diyaudio.com/forums/soli...terview-error-correction-117.html#post1071612
attenuates the error and then amplifies. This is a source of intra-loop distortion that is avoided with a diff. stage approach which maintains unity gain transmission of error throughout.
In Hawksford's arrangement the bias resistors R3 and R4 here:
http://www.diyaudio.com/forums/soli...terview-error-correction-117.html#post1071612
are also used to set balance in error correction as explained in the above link.
I.e: if you adjust R3 and R4, then you must adjust R1 and/or R2 to compensate.
Hi Mike,
The circuit you cite is an old HEC circuit that is not the one that I used and published. This may be the source of confusion. Take a look at Figure 12.5 in my book. There you can see that there are separate pots for bias adjustment and HEC trim. This is the circuit wherein we are referring to the interaction as being very small.
Cheers,
Bob
It's a family of circuits.....need to publish first.
Note that HEC here:
http://www.diyaudio.com/forums/soli...terview-error-correction-117.html#post1071612
attenuates the error and then amplifies. This is a source of intra-loop distortion that is avoided with a diff. stage approach which maintains unity gain transmission of error throughout.
Hi Mike,
Thanks. I'll look forward to seeing it when you publish it.
Cheers,
Bob
at first look this patent (and the associated schematic) looks very similar:Elektor Electronics have agreed that I can post the schematics of my ec power amp on-line. The first article appeared in the April issue and described the output power stage. Circuit below.
Part 2 (Vas) and part 3 (comprehensive protection system) will appear in the May issue. I will post schematics when they are available.
Feedback, global or not 😉 is welcome!
Jan Didden
http://www.diyaudio.com/forums/soli...-current-feedback-amp-patent.html#post2736446
at first look this patent (and the associated schematic) looks very similar:
http://www.diyaudio.com/forums/soli...-current-feedback-amp-patent.html#post2736446
Interesting that this patent was issued December 2010, less than one year ago.
I'm still waking up, so did not absorb much of the included schematic. Were you suggesting it looked very similar to Jan's circuit?
Cheers,
Bob
EC
IMHO, it has nothing to do with Jan's EC circuit (i.e. the paX amp).
BTW, cited from Jan's website: "Error correction is, in my view at least, more elegant than negative feedback."
As this kind of EC is also based on feedback and given the added complexity, I don't see why it's more elegant.
IMHO, it has nothing to do with Jan's EC circuit (i.e. the paX amp).
BTW, cited from Jan's website: "Error correction is, in my view at least, more elegant than negative feedback."
As this kind of EC is also based on feedback and given the added complexity, I don't see why it's more elegant.
IMHO, it has nothing to do with Jan's EC circuit (i.e. the paX amp).
BTW, cited from Jan's website: "Error correction is, in my view at least, more elegant than negative feedback."
As this kind of EC is also based on feedback and given the added complexity, I don't see why it's more elegant.
Hi Edmond,
Given what we've learned over the last couple of years, I think it is reasonable to compare the effectiveness of HEC with TMC. I seem to recall in my own experience that TMC was able to produce some really low-distortion amplifiers.
The thing I've always liked about HEC, is that it does a good job of locally taking care of the transconductance droop in a MOSFET power amplifier right at its source. However, I agree that one may be able to assert pretty much the same thing about TMC.
The bottom line with HEC is that I achieved about 30 dB reduction in THD at 20 kHz using HEC, which I think was pretty good.
Compared to the TMC architecture, HEC is certainly more complex, adding at least four small-signal transistors to the output stage.
Cheers,
Bob
adding gain (in local loops as in HEC) is way different from "rearranging the deck chairs" as in TMC vs TPC
although efective use of TMC, TPC requires high loop gain techniques llike "beta enhancement", buffering to give improvement over single pole Miller Cdom compensation
all distortion reduction schemes need to be compared on equal/equivalent stability - particularly to output loading induced phase shift
although efective use of TMC, TPC requires high loop gain techniques llike "beta enhancement", buffering to give improvement over single pole Miller Cdom compensation
all distortion reduction schemes need to be compared on equal/equivalent stability - particularly to output loading induced phase shift
Bob,
Have you combined TMC with EC in a practical amp?
Hi Mike,
No, I have not.
In doing so, my concern would be the additive effect of increased net loop gain around the output stage, possibly detracting from stability.
Cheers,
Bob
all distortion reduction schemes need to be compared on equal/equivalent stability - particularly to output loading induced phase shift
Hi jcx,
I agree, and I will be the first to admit that this is sometimes hard to do on a correct basis. There is potentially a lot more to it than just looking at global loop gain margin and phase margin.
Cheers,
Bob
TMC
I dont think that an amp with TMC alone can equal an amp with an EC(negative feedback) or HEC output stage.
Edmonds ETMC compensated amps look like they get a bit closer to EC amps THD performance at least in simulations.
I dont think that an amp with TMC alone can equal an amp with an EC(negative feedback) or HEC output stage.
Edmonds ETMC compensated amps look like they get a bit closer to EC amps THD performance at least in simulations.
IMHO, it has nothing to do with Jan's EC circuit (i.e. the paX amp).
BTW, cited from Jan's website: "Error correction is, in my view at least, more elegant than negative feedback."
As this kind of EC is also based on feedback and given the added complexity, I don't see why it's more elegant.
You're right Edmond, I would say this different now. In the introduction of the paX article in Elektor I specifically state that H.ec is a form of negative feedback, or something to that effect.
I should indeed update my web page. Thanks for the heads up; I wouldn't want you to think I cannot learn new things anymore 😉
jan
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