In future posts I will attempt to tie together the SIT mu follower with the SIT sweet spot parameter behavior posted earlier. The important result will be that class-A output power level can be significantly increased using the mu follower.
Yes, significantly increased distortion as a consequence. Any deviation from the test configuration, such as balanced mode, paralleled devices, forward biasing, leads to a deprivation of characteristics.
What do you like about the depletion mode parts other than the bias voltage?
Here are some curves with CS mode/mu follower and also CCS and CD
curves with CCS.
60V supply, about 3A current.
Attachments
The SIT sweet spot measurement circuit shown in post #2 can be converted to an equivalent circuit that is similar to the FirstWatt SIT-1, and the 4-parameters of the surface parameters shown in post #10 can be used to compute the "SIT-1" sweet spot for a given rail voltage Vrail, output load resistance Rload, and desired bias current Id.
Attachments
Aargh! Pulling out my hair.. :-( but aren't we already past end of January? It looks fantatic though! Looking foreward to full disclosure 😀 Thanks Nelson for all these nice projects!!
New DIY Sony channel finally seeing the light.
Sensational 😀
Thanks for last news Mr. Pass!
lhquam ..... I'm always confessing that I'm mathematically challenged ...... not that I was dumb in school , but more like short-memory and , frankly , always more interested in (other) books......
so , I just can't catch/connect - magic parameters A,B,C,D - how you determine them?
can you draw me an example or - if you did it already in quoted post , can you clarify ...... I'm missing that step, obviously ......
The parameters A, B, C, D are computed using linear least-squares. I will attempt illustrate it using LibreOffice Calc which I think is compatible with Excel or some other Windows spreadsheet. I am almost totally ignorant in the use of spreadsheets, so it might take a while. Someone else might give it a try.
The function to minimize is:
sum (A*Vd_i + B/RL_i + C*Vd_i/RL_I + D - Id_i)^2
Here is the raw data:
Vd Id RL
14.36000 1.36250 4.00000
29.27000 2.24750 4.00000
33.55000 2.52000 4.00000
35.92000 2.71000 4.00000
39.44000 2.91500 4.00000
10.80000 0.63667 6.00000
17.67000 0.98167 6.00000
24.09000 1.29500 6.00000
32.06000 1.70333 6.00000
42.00000 2.18333 6.00000
50.00000 2.55833 6.00000
16.83000 0.74500 8.00000
24.03000 1.01625 8.00000
33.23000 1.36250 8.00000
37.90000 1.53375 8.00000
42.10000 1.67750 8.00000
52.20000 2.09375 8.00000
58.40000 2.31375 8.00000
14.41000 0.52400 10.00000
20.96000 0.73600 10.00000
28.46000 0.98100 10.00000
37.43000 1.24700 10.00000
48.00000 1.57500 10.00000
56.40000 1.82500 10.00000
New DIY Sony channel finally seeing the light.
I like the , ??? , mystery transistor and unobtainium 😀
I hope to be one of the lucky one 😉
.
tnx
now I remember learning that , but I didn't catch it's English name , obviously not same as in Serbian 🙂
I'll try to crack it and connect (in my head) with funny Sits