Attention guys I don't hear any kind of pop click using abraxalito 4th passive filter when I change formats between DSD & PCM or viceversa, only a pop when power on I guess because I don't use a bleeder resistor after the output capacitor. Attached schematic.
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Hi Merlin,
I got two i2s isolating boards from Diyinhk laying around for month now. I read in the thread that you are using these also. What isolator chip are you using on those board and do they make a difference with the amanero?
Klaus
I got two i2s isolating boards from Diyinhk laying around for month now. I read in the thread that you are using these also. What isolator chip are you using on those board and do they make a difference with the amanero?
Klaus
Hi Klaus,
Finally don't used the isolators because introduces noise. Capacitors used Russian teflon FT-3 0,1uF: one for C3 and two in parallel for C2, inductors used Janzen wax coil adjusting the value needed with an LCR meter.
Greetings
Felipe
Finally don't used the isolators because introduces noise. Capacitors used Russian teflon FT-3 0,1uF: one for C3 and two in parallel for C2, inductors used Janzen wax coil adjusting the value needed with an LCR meter.
Greetings
Felipe
Thanks Felipe,
Looks like you are using the SE version of the noDac.
What would the schematic look like for the differential version?
Did you wind L1 and L2 yourself or are those stock parts?
Where is C2 located on the above schematic?
Greets,
Klaus
Looks like you are using the SE version of the noDac.
What would the schematic look like for the differential version?
Did you wind L1 and L2 yourself or are those stock parts?
Where is C2 located on the above schematic?
Greets,
Klaus
Hi Klaus,
Yes SE, sounds far better than balanced using chips (attached schematic bor balanced isn't mine I guess is published in this thread).
No I didn't wind my own inductors I bought Janzen Wax coils, I bought 0,22mH and take off several turns till measures 0,205mH and the same with 0,56mH taking of several turns to reach 0,5mH
I'm sorry isn't C2 it's C3.
Cheers
Felipe
Yes SE, sounds far better than balanced using chips (attached schematic bor balanced isn't mine I guess is published in this thread).
No I didn't wind my own inductors I bought Janzen Wax coils, I bought 0,22mH and take off several turns till measures 0,205mH and the same with 0,56mH taking of several turns to reach 0,5mH
I'm sorry isn't C2 it's C3.
Cheers
Felipe
Attachments
I'm using Daphile as player so Linux based.
Try this one:
firmware 2005be e Cpld_for_1081
If doesn't works for you, try this other:
firmware_1099c e cpld_for_1080
Try this one:
firmware 2005be e Cpld_for_1081
If doesn't works for you, try this other:
firmware_1099c e cpld_for_1080
Are the latest firmware Linux recommended by Dom of Amanero, he is developing the final version of firmware for Linux for DSD512.
Windows guys the recommended firmware by Dom of Amanero is DSD512x44x48.
I received the Dom's advice by email one week ago.
Cheers
Felipe
Windows guys the recommended firmware by Dom of Amanero is DSD512x44x48.
I received the Dom's advice by email one week ago.
Cheers
Felipe
so is the ''white noise'' some/all people are/were experiencing still a mystery?
I tried using Bisesik's current out DAC trafo as a test with DIYinHK interface, primary resistance of 10ohm is probably too low but there is sound and it was drowned in that ''white noise''.
There is only the trafos own filtering here, but as we know DSD noise is above audible spectrum so did not try adding any other filtering
I tried using Bisesik's current out DAC trafo as a test with DIYinHK interface, primary resistance of 10ohm is probably too low but there is sound and it was drowned in that ''white noise''.
There is only the trafos own filtering here, but as we know DSD noise is above audible spectrum so did not try adding any other filtering
replacing trafo with 1k resistor and 10n cap brought noise way down to tolerable levels but it is still an issue for proper use with headphones.
Even with the noise the sound is pure magic and instantly appreciable, there is no going back to a normal dac ever again, completely outclasses 9038Pro/Q2m DACs ive used in resolution but the real ''magic'' is how pure and natural it sounds...
also the noise increases with higher DSD rates in my case
Even with the noise the sound is pure magic and instantly appreciable, there is no going back to a normal dac ever again, completely outclasses 9038Pro/Q2m DACs ive used in resolution but the real ''magic'' is how pure and natural it sounds...
also the noise increases with higher DSD rates in my case
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Maybe the huge out-of-band quantization noise intermodulates with itself in the amplifier, causing an increase of the in-band noise floor. What happens when you have two or three RC branches between the transformer and the amplifier, or even better, an LC filter with inductors with a decent air gap?
if there were the case wouldnt increasing DSD rate help reduce this effect with the current filter, not increase it?
When any of the DSD rates are active the noise is already there even without playback, and becomes quite a bit louder when actual playback begins.
Even though the audible noise is louder the higher DSD rates sound a lot better, so I think the ultrasonic noise is being filtered more effectively.
Im not sure this is anything like the problems other have been having, could mean the board is faulty
I don't know. On one hand the power spectral density of the out-of-band quantization noise should get lower with increasing DSD rate, on the other hand, the higher the DSD rate, the more often the signal switches, and the more often the amplifier can be driven into slewing.
There are 5 poles in the filter now, with extreme treble rolloff, but the noise has remained.
With a similar level as when you only had a trafo and no filter, or as when you had a first-order RC low-pass?
Can you show the schematic of your DAC (I've only read a part of this thread) or link to it?
Can you show the schematic of your DAC (I've only read a part of this thread) or link to it?
noise is roughly the same as the first RC, I wonder if input impedance of next stage may be too low, thats the only thing I can think which would explain so much more noise with the 10 ohm trafo primary.
I would like a balanced OP, so could kill 2 birds with 1 stone with the addition of the flip flop as a buffer
I would like a balanced OP, so could kill 2 birds with 1 stone with the addition of the flip flop as a buffer
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My experience is the same as you. The higher DSD rate degrades SNR in the analog domain though it can have excellent numbers in the digital domain. It's probably imbalance between rise and fall time of the pulse. The output of DSD toggles frequently even in no sound(the input is zero). Higher DSD rate increases the toggle counts, which results in poor SNR. If you are in the digital domain, no imbalance exists.
Standard FF like 74HC74 doesn't have the same rise and fall time. If you use a high-speed RF DAC(more than 100MHz), you can have better SNR than 74HC74 in my experience because it has almost the same rise and fall time. DSD64 and DSD512 can have the same SNR.
Another way to improve SNR is a multi-bit solution instead of 1 bit(DSD). Degradation by the imbalance depends on bit resolution because DSD always swings from +1 to -1 even in no sound. If you use 2bit DSM, the swing is from +0.5 to -0.5. So, the noise power caused by the imbalance decreases a half. With 4bit DSM, you can improve the noise floor by15dB in my experience, though more than 5bit doesn't dramatically improve SNR because of another analog problem. The disadvantage of a multi-bit is degradation of THD. It's not easy to have coexistence with SNR and THD.
It should be possible to improve things quite a bit with fast flip-flops, logic gates to make it a return-to-zero DAC and a well-filtered supply that supplies only the flip-flops and logic gates. Right now you have all digital noise of the XMOS interface on the reference (supply) of the DAC and the problem with unequal rise and fall times that xx3stksm mentioned.
As an example of a very basic return-to-zero DAC, see how the flip-flops and the NOR gates are connected in this circuit:
Simple second-order sigma-delta for checking raw DSD interfaces
After a rising clock edge, the NOR gate output always switches to 0. Depending on the data, it either does or doesn't go to 1 after the falling edge. This eliminates the effect of unequal rise and fall times at the expense of a worsened sensitivity to clock jitter.
Simple second-order sigma-delta for checking raw DSD interfaces
After a rising clock edge, the NOR gate output always switches to 0. Depending on the data, it either does or doesn't go to 1 after the falling edge. This eliminates the effect of unequal rise and fall times at the expense of a worsened sensitivity to clock jitter.