You have asked for directions. Here there are.
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My layout is double-sided 🙁
However, the schematic and PCB overview are in your mail - see if you can do something with them.
VirtualZero trans-impedance stage
Natural evolution of the latest developments - fully symmetric TIS, based on my AmpliWire basic topology.
Combination of decent speed and high linearity. No lag compensation required. Nested feedback is recommended (as shown) when used with NS-OPS.
Natural evolution of the latest developments - fully symmetric TIS, based on my AmpliWire basic topology.
Combination of decent speed and high linearity. No lag compensation required. Nested feedback is recommended (as shown) when used with NS-OPS.
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Ultimate amplification machine Another possible improvement is to hang this TIS off the LTP configuration used in Edmond Stewart's SuperTis. Get the added advantage of CMCL effect.
Super TIS
I think, I'm going to slow down a bit 🙄
Unless something really cool comes to my mind 😛
Beautiful Boards Jeff, and a powerful looking amp. The output on this thread is incredible. Hell of a read.
Tell me did the vertical NS-OPS ever get adapted for output doubles?
Tell me did the vertical NS-OPS ever get adapted for output doubles?
Hi Rich, yes - it will work with 2 pairs no problem. I tested my early prototype with 1, 2 and 3 pairs. You can use the same boards, just skip one pair on each.
VirtualZero trans-impedance stage - jFET input option
Continuing with this rather novel front-end approach, there's an option for those who likes jFETs at the input now. Both BJT (post #684) and jFET (attached here) input topology options will be available on the same PCB. We will try to compare their sonic nuances as soon as we have a chance.
Continuing with this rather novel front-end approach, there's an option for those who likes jFETs at the input now. Both BJT (post #684) and jFET (attached here) input topology options will be available on the same PCB. We will try to compare their sonic nuances as soon as we have a chance.
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Hi Terry,
Talking particularly about using jFETs in the input stage, they are showing the following properties:
- much higher input impedance, than BJTs. Virtually no input current within the audio bandwidth. Very high DC stability (low offset drift).
- low noise, which is always a plus in the input stage.
- much higher temperature stability than with BJTs - low dependency of the drain current on the temperature - adding to low offset drift.
- lower gain - can be used without source degeneration. In some other cases it may be a minus, but in our case that's what we want here - moderate gain with high linearity.
- reverse bias - easy to bias in symmetric complementary designs (single resistor sets the bias for both complementary LTPs).
So, in overall, jFETs at the input allow highly stable, low noise, moderate gain stage, with rather simple, small part count topology.
It would be very interesting to see if there will be some noticeable sonic difference between the options with BJTs and jFETs at the input, having the rest of the setup exactly the same.
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