dam1941 - Next Gen Discrete R-2R Sign Magnitude 24 bit 384 Khz DAC module

[Blitz]

I am comparingits development to myFifo2 buffalloIII dual mono setup... and have the impression it is still burning in.

Currentyly I have a lot of clarity and 3D...a lot. Better than Biii... bit it sounds as well a bit dry, avery little bit less fluent and less musical... BUT i have not done anything around the PSU. It is still stock lm317 etc.

What I would love to try is Ian's new battery supply for the analog stage... but I am afraid to damage the DaC as i have either 3.3V or 6.6V as choices only.

I can see a lot of local regs on the board...so maybe it could work anyhow? Any hints are welcome...

Whathasbeen your experiences reg. PSUs and sound with the 1941?

 

[analog_sa]

What I would love to try is Ian's new battery supply for the analog stage..

What do you mean by "analog stage"? Are you using the opamp board?

Or perhaps you mean to replace the reference voltage.

 

[dewdrop]

I am comparingits development to myFifo2 buffalloIII dual mono setup... and have the impression it is still burning in.

Currentyly I have a lot of clarity and 3D...a lot. Better than Biii... bit it sounds as well a bit dry, avery little bit less fluent and less musical... BUT i have not done anything around the PSU. It is still stock lm317 etc.

What I would love to try is Ian's new battery supply for the analog stage... but I am afraid to damage the DaC as i have either 3.3V or 6.6V as choices only.

I can see a lot of local regs on the board...so maybe it could work anyhow? Any hints are welcome...

Whathasbeen your experiences reg. PSUs and sound with the 1941?

Use a 5V reg after the 6.6V battery rail as suggested by Ian.

 

[Blitz]

What do you mean by "analog stage"? Are you using the opamp board?

Or perhaps you mean to replace the reference voltage.

Pin DescriptionJ7, Power Connection, 6 pins MTA156 Header.PinNameTypeDescription

1 GND PowerGround
2 VCC5D PowerInput+5V Digital Power
3 GND PowerGround
4 VEE5A PowerInput-5V Analog Power
5 GND PowerGround
6 VCC5A PowerInput+5V Analog Power

I meant Pin 4+6.

I know that I can put a 5V reg in between, but this destroys a bit the advantage/concept of using a pure battery supply...

 

[analog_sa]

The 5v gets regulated to 4v with the opamp based regulators. In the 1021 it was a popular mod to include a pass transistor in the regulator circuit which made it easy to increase the dissipation, so 6.6v would have been viable.

Otoh, some users reported success by applying directly battery power to Vref. Apparently 3.3v worked fine at the expense of slightly lower output. In the 1941 case this means 4 batteries and some on-board surgery.

Not sure if the 5v supplies are used for anything else, but it's easy to retain them and just supply the reference voltage off batteries.

 

[analog_sa]

Oops. Just looked at the board. Not 4, but 8 batteries @3v3

All that needs to be done is remove the 8 opamps U57 - U66 and apply the batteries directly to the 1000u caps. Not sure i am going to do it, although it would take 5 minutes.

And of course it's best to obtain Soren's blessings first


I, otoh, am sorely tempted to remove the galvanic isolation at the i2s port. For some unfathomable reasons this resulted a substantial improvement with the 1021.

Any strong reason not to do it?

 

[analog_sa]

Time for a second oops? Forgot the 1941 board has no max232 and the galvanic isolators isolate the serial port as well. And most likely the same isolator is shared between i2s and serial, so shorting those will make serial comms unjustifiably dangerous. Damn.

 

[soekris]

Oops. Just looked at the board. Not 4, but 8 batteries @3v3

All that needs to be done is remove the 8 opamps U57 - U66 and apply the batteries directly to the 1000u caps. Not sure i am going to do it, although it would take 5 minutes.

And of course it's best to obtain Soren's blessings first

The dam19x1's vref circuit is more or less like the dam1021. The +-5V supplies the vref generator itself, the vref buffers and -5V are needed for the mute circuit.

So you can lift the opa365 and supply vref power by batteries, the large capacitors are a good point to supply the power. Keep +-5V and the power up and mute circuit should work just fine.

As usual, I can't recommend modifying the boards and the warranty will not cover if, or when, you do something you shouldn't have done....

I, otoh, am sorely tempted to remove the galvanic isolation at the i2s port. For some unfathomable reasons this resulted a substantial improvement with the 1021.

Any strong reason not to do it?

You loose isolation and might complicate the workings of the USB interface, so don't do that.

 

[soekris]

Time for a second oops? Forgot the 1941 board has no max232 and the galvanic isolators isolate the serial port as well. And most likely the same isolator is shared between i2s and serial, so shorting those will make serial comms unjustifiably dangerous. Damn.

The serial port on the dam19x1 is not isolated, the dam19x1 is designed to use primarily the hardware user interface.

 

[analog_sa]

Many thanks for all the advice Søren.

 

[Blitz]

The dam19x1's vref circuit is more or less like the dam1021. The +-5V supplies the vref generator itself, the vref buffers and -5V are needed for the mute circuit.

So you can lift the opa365 and supply vref power by batteries, the large capacitors are a good point to supply the power. Keep +-5V and the power up and mute circuit should work just fine.

As usual, I can't recommend modifying the boards and the warranty will not cover if, or when, you do something you shouldn't have done....



You loose isolation and might complicate the workings of the USB interface, so don't do that.

Sorry to ask again, but do I get this right:

- Nothing needs to be de-soldered
- the larger two brown lytics on the board would get the +-6.6V from the batteries
- the analog +-5V supply on the pin 4 and 6 will not be connected anymore.

If I did not get it right, could someone please circle the areas on the pcb for a not so experienced Soekris-Newbie.

 

[soekris]

Sorry to ask again, but do I get this right:

- Nothing needs to be de-soldered
- the larger two brown lytics on the board would get the +-6.6V from the batteries
- the analog +-5V supply on the pin 4 and 6 will not be connected anymore.

If I did not get it right, could someone please circle the areas on the pcb for a not so experienced Soekris-Newbie.

You would need to remove the opa365 vref buffers. Connect battery power to the polymer capacitors close to each opa365, not the two large electrolytic capacitors. You would need to keep +-5V analog power for power up circuit and mute circuit to work.

As I said, I do not recommend to modify the dam19x1, especially if you're as inexperienced as you sounds like....

 

[Blitz]

Well. I have no issue to do smd soldering, air de soldering station etc is there...I need just the illustration or pcb Id numbers of the components we talk about not to touch the wrong stuff...as there is no schematic...

 

[analog_sa]

Gave references in post 386. It is really a 5 minute job if you have the batteries already sorted.

 

[analog_sa]

A question for Søren

Are there any issues with raising Vref to 5v? I would think not, but safer to ask.

The battery idea does not appeal to me, but i can see 8 Salas shunts, perhaps on a dedicated sandwiched board and a large sink.

 

[analog_sa]

And what is the maximum current draw from each Vref?

 

[soekris]

Are there any issues with raising Vref to 5v? I would think not, but safer to ask.

The battery idea does not appeal to me, but i can see 8 Salas shunts, perhaps on a dedicated sandwiched board and a large sink.

The used 74LVC595 are really 3.3V parts, and although they have a 6.5V max VCC, their inputs from the FPGA are still 3.3V logic signals.... I found that their output impedances are also more symmetric at 3.8V-4.0V VCC, so that's what I ended at.

So it might work with higher VCC, but you may also run into problems.... You might also see higher distortion as the resistors are matched to the buffers output impedance at 3.8V....

And what is the maximum current draw from each Vref?

From manual: analog power divided by number of vrefs, so about max 25 mA each.

 

[analog_sa]

Thanks!

So, the 5v idea is not great. Perhaps another shunt reg better suited for 4v then.

 

[lawrence735]

FIR2 always 384k whether 44.1k or 48k source playing

@Søren

Finally, having my DAM1921 firmware updated 1.23 last weekend. Well, a 3.3V CMOS TTL RS232 is must, and with 1k file transfer, I found I have to set TX/RX delay 100ms to get a stable result ...

But I found something strange, whether my source playing 44.1k or 48k, the FIR2 always come out with 384k, as shown below,

There is FIR2 352.8k for both linear or minimum, should anything set to get FIR2 352,8k while playing 44.1k based ?

"R1.23
M1
I7
L000
F6
V+00
PN
V+00
I0
I3
L044
I0
L044


dam1941 uManager Rev 1.23 20190311 FPGA Rev 1.23 Press ? for help.

# filters

06 Minimum Phase FIR1, 44.1 Ksps, 19.8 Khz - 1 db, 23.1 Khz -100 db
10 Minimum Phase FIR2, 384 Ksps, 120 Khz -1 db, 48 db/oct
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# set filter=linear
F4


# filters

04 Linear Phase FIR1, 44.1 Ksps, 21.3 Khz - 1 db, 21.9 Khz -130 db
08 Linear Phase FIR2, 384 Ksps, 111 Khz -1 db, 192 Khz -130 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# filters

04 Linear Phase FIR1, 44.1 Ksps, 21.3 Khz - 1 db, 21.9 Khz -130 db
08 Linear Phase FIR2, 384 Ksps, 111 Khz -1 db, 192 Khz -130 db
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS

# exit

L048


dam1941 uManager Rev 1.23 20190311 FPGA Rev 1.23 Press ? for help.

# filters

04 Linear Phase FIR1, 48 Ksps, 23.2 Khz - 1 db, 23.8 Khz -130 db
08 Linear Phase FIR2, 384 Ksps, 111 Khz -1 db, 192 Khz -130 db
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS

# set filter=minimum
F6


# filters

06 Minimum Phase FIR1, 48 Ksps, 21.5 Khz - 1 db, 25.0 Khz -100 db
10 Minimum Phase FIR2, 384 Ksps, 120 Khz -1 db, 48 db/oct
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 384 Ksps, 50/15 uS

# filters [all]

04 Linear Phase FIR1, 44.1 Ksps, 21.3 Khz - 1 db, 21.9 Khz -130 db
04 Linear Phase FIR1, 48 Ksps, 23.2 Khz - 1 db, 23.8 Khz -130 db
05 Mixed Phase FIR1, 44.1 Ksps, 20.2 Khz - 1 db, 22.0 Khz -130 db
05 Mixed Phase FIR1, 48 Ksps, 22.0 Khz - 1 db, 24.0 Khz -130 db
06 Minimum Phase FIR1, 44.1 Ksps, 19.8 Khz - 1 db, 23.1 Khz -100 db
06 Minimum Phase FIR1, 48 Ksps, 21.5 Khz - 1 db, 25.0 Khz -100 db
07 Soft Minimum FIR1, 44.1 Ksps, 21.5 Khz - 1 db, 36 db/oct
07 Soft Minimum FIR1, 48 Ksps, 23.4 Khz - 1 db, 36 db/oct
04 Linear Phase FIR1, 88.2 Ksps, 38.7 Khz - 1 db, 39.8 Khz -130 db
04 Linear Phase FIR1, 96 Ksps, 42.1 Khz - 1 db, 42.2 Khz -130 db
05 Mixed Phase FIR1, 88.2 Ksps, 35.4 Khz - 1 db, 43.6 Khz -130 db
05 Mixed Phase FIR1, 96 Ksps, 38.5 Khz - 1 db, 47.5 Khz -130 db
06 Minimum Phase FIR1, 88.2 Ksps, 29 Khz -1 db, 48 Khz -100 db
06 Minimum Phase FIR1, 96 Ksps, 32 Khz -1 db, 52 Khz -100 db
07 Soft Minimum Phase FIR1, 88.2 Ksps, 27 Khz -1 db, 36 db/oct
07 Soft Minimum Phase FIR1, 96 Ksps, 29 Khz -1 db, 36 db/oct
04 Linear Phase FIR1, 176.4 Ksps, 77 Khz -1 db, 80 Khz -130 db
04 Linear Phase FIR1, 192 Ksps, 84 Khz -1 db, 87 Khz -130 db
05 Mixed Phase FIR1, 176.4 Ksps, 65 Khz -1 db, 88 Khz -130 db
05 Mixed Phase FIR1, 192 Ksps, 70 Khz -1 db, 95 Khz -130 db
06 Minimum Phase FIR1, 176.4 Ksps, 50 Khz -1 db, 92 Khz -100 db
06 Minimum Phase FIR1, 192 Ksps, 54 Khz -1 db, 100 Khz -100 db
07 Soft Minimum Phase FIR1, 176.4 Ksps, 46 Khz -1 db, 48 db/oct
07 Soft Minimum Phase FIR1, 192 Ksps, 50 Khz -1 db, 48 db/oct
04 Bypass FIR1, 352.8 Ksps
04 Bypass FIR1, 384 Ksps
04 Linear Phase DSD 2.8 Msps, 30 Khz -3db
05 Mixed Phase DSD 2.8 Msps, 30 Khz -3db
06 Minimum Phase DSD 2.8 Msps, 30 Khz -3db
04 Linear Phase DSD 5.6 Msps, 60 Khz -3db
05 Mixed Phase DSD 5.6 Msps, 60 Khz -3db
06 Minimum Phase DSD 5.6 Msps, 60 Khz -3db
04 Linear Phase DSD 11.2 Msps, 70 Khz -3db
05 Mixed Phase DSD 11.2 Msps, 70 Khz -3db
06 Minimum Phase DSD 11.2 Msps, 70 Khz -3db
08 Linear Phase FIR2, 352.8 Ksps, 102 Khz -1 db, 177 Khz -130 db
08 Linear Phase FIR2, 384 Ksps, 111 Khz -1 db, 192 Khz -130 db
10 Minimum Phase FIR2, 352.8 Ksps, 110 Khz -1 db, 48 db/oct
10 Minimum Phase FIR2, 384 Ksps, 120 Khz -1 db, 48 db/oct
29 DC Blocking IIR, 352.8 Ksps, 2 Hz HP 1st order
29 DC Blocking IIR, 384 Ksps, 2 Hz HP 1st order
30 Deemphasis IIR, 352.8 Ksps, 50/15 uS
30 Deemphasis IIR, 384 Ksps, 50/15 uS

#"

Lawrence

 

[Blitz]

Soren,

May I ask: When I use the second I2S input, is the isolator still in use ? My waveio comes with an isolator chip already, so either or to be used ? Any advice on separate power for the input vs. output side ?