Please Help for SPDIF interface on TDA1541 dac

I2s input:

+1 for Rick Pa Stadel :


I will hack this board by injecting I2S just before the TDA 1541A with care :short length so some 3d stacking receiver board on the blue pcb.


JLSounds spidf/usb to I2S board
Lorien Wave I/O - spidf/usb to I2S- board
perhaps IanCanada FifoPi with spidf hat : but first check the I2S is ok fr the TDA1541A.


You will save monney, time, many god hours of good listening. All the boards have good enough clocks for the TDA1541A (I own one with Crysteck clocks).

Nice ideas Too!!
Thank you!!!!
 
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always better on a standalone board :) , I just will purchase an Audial DIY board... but he can be attracted by the tubes outputt of the blue board ?
eventually the Audial board can be cuted at the outputt of the dac chip to paste the blue board tube itself cuted !



But it's glue not to the good practices... a standalone for the ground management and signals integrity is safer, sure ! the analog outputt is proofer... the digital inputt... splitting boards here is like to try to do a flat lasagna with mutiple spaghetis ! Uh...
 
Yes, sure...

I am sure in your minds eye you see yourself building the dac equivalent of a fine automobile but it seems to me you are well on the way to building what we in the UK call a cut-and-shut.

Hello, yes, until the moment, really, i have copy a lot of the ´´chinese DAC´s, but, i use for initially ideas, and correcting the design problems.

And i try to build a product at least a little more decent as possible, with the information I get.

Thank you for your Kindness!!!
 
Modifications on the circuit

Hello Again, i have make some modifications on the ´´Cut and Shut Dac``

I changed the Slave CS8412 for one CS8414 (in Master Mode now) i add one ASRC AD1896 in slave mode, and i add the option with dip Switch/ Jumper for OS/No Os option, and i add one programable Masterclock CDCE906 IC.

With the Bypass Mode for the same input and output bitrate. (without upsampling)

This circuit are correct?

Thanks again!
 

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I will give it a good study. Please bear in mind, being a novice when it comes to these IC's, it'll take me several days (providing Chrome doesn't implode on me again, discarding all my placeholders) to get up to speed on the new parts.

Still suspect that you might have better luck building a known-working design, with no *improvements*, rather than design-from-scratch.

But hey, we're learnin' stuff, eh? ;)

Cheers
 
clock inputs for slave mode ASRC

I use the old reclock mode of previous project idea for clock inputs(inputs in slave mode) of the AD1896, for make this clocks for BCLK / LRCLK (256fs):
(for compatibility of 32fs 16bit i2s output too)

For the divides the clock with the 11.2896 mhz, in OS Mode (with SAA7220 IC on Socket of the DAC):

Q1 - 5,6448 MHZ
Q2 - 2,8224 MHZ (BCLK_O)
Q3 - 1,4112 MHZ
Q4 - 0.7056 MHZ
Q5 - 3528 KHZ
Q6 - 1764 KHZ
Q7 - 88,2 KHZ
Q8 - 44,1 KHZ (LRCLK_O)

And for NO OS mode:

For the divides the clock with the 24.576mhz, (without SAA7220 IC on DAC Socket):

Q1 - 12.288 MHZ
Q2 - 6,144 MHZ (BCLK_O)
Q3 - 3,072 MHZ
Q4 - 1,536 MHZ
Q5 - 768 KHZ
Q6 - 384 KHZ
Q7 - 192 KHZ
Q8 - 96 KHZ (LRCLK_O)


This mode of clock are acceptable?

Thanks!!!
 

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I have simulate in the Labcenter Proteus on Simulator, and the clocks of the 74HC161 ..

Yep, pretty sure that is not right. But I'm not familiar with that simulator; has it been trustworthy on other sims? A decade or two ago, I could've gone downstairs, put a 'scope probe on a couple of HC161's and say for sure; but today it would be a substantial undertaking.

I think you are getting close to something that will work, though I still wish I could talk you out of trying to design for every possible signal / sample rate / NOS/OS, etc.

The AD1896 looks like quite a problem-solver. If I ever buy one and get to watch it work, it'll surely amaze me -- even if it only sounds *OK* -- but especially for only around $5. But it is another substantial spec PDF, with lots of options. I almost mistakenly complained about your BCLK_O and LRCLK_O outputs conflict 'til noticing the _O's were 'slave', too!:eek:

Still have some doubts about the SAA7220 for this project, and haven't spent nearly enough time on its PDF yet. Will do now. :cheers:

Regards
 
Welcome to the forum Izy,

I'm not the wisest when it comes to forum ethics, but it seems to me that your inquiry might merit its own thread . .

Maybe click 'Report' and ask a moderator to move it ? ;) (There used to be a little exclamation mark in a safety triangle to be used to get a moderator's attention; sorry, but I don't know the proper technique now.)

Cheers