Now you have the chance to build a great DAC but there are some critical factors to consider...
Thank you, i will make one non oversampling version too!🙂
CXD1244 Pin 9 should be connected to 384Fs but before you go any further look at page 362 of the posted datasheet. The bit clock output of the DIR9001 is 64Fs but the bit clock input of the CXD1244 is 48Fs.
The src4193 sampling rate converter resolve the problem of output bck pin on 48fs???
It will but so would the DIX4192 without the ASRC.
Hello, this ic are excellent idea, and have this ic too: TC9337F, this ic are good for this appliation too?? (convertion on 64fs to 48fs) ?
I'm not finding anything regarding 48fs on the TC9337 data sheet.
Also, the CXD8003 block diagram shows pins 25, 26, and 27 not driven by the XIN and XOUT circuit -- just MST.CLK, pin 7, and other innards.
Still think it would be worth a try, driving both XIN's (CXD1244 & CXD8003) by the same signal, and working to find/produce a signal they're both happy with. At least one of the examples does that, so it can't be completely impossible.
Cheers
Also, the CXD8003 block diagram shows pins 25, 26, and 27 not driven by the XIN and XOUT circuit -- just MST.CLK, pin 7, and other innards.
Still think it would be worth a try, driving both XIN's (CXD1244 & CXD8003) by the same signal, and working to find/produce a signal they're both happy with. At least one of the examples does that, so it can't be completely impossible.
Cheers
It is not about inconvenience. I am not forced to respond. However, there is only so much one can do to help.
It is not about inconvenience. I am not forced to respond. However, there is only so much one can do to help.
Ok, i Understand. And Thank you for all answers!
Umm-mm, couple o' things still ..
R7 can be omitted. CXD8003 pins 24, 25, 26, and 27 will only provide a signal if that oscillator (pins 25 and 26) is running, probably as originally connected.
The problem with that would be the same trouble the design now faces -- incoming S/PDIF comes with its own clock, and it won't be frequency OR phase-matched with the TCXO. And that is the case whether the 11.2896 MHz comes from a crystal that the 8003 drives, OR a separate TCXO.
I'm pretty sure it would be at least worth trying driving both XIN's (CXD1244 pin 9, 8003 pin 22) with the recovered MCK from the S/PDIF receiver. Aren't both of those IC's still connected much as in the original equipment? Just defeat the 3/2CLK loop and run a jumper between the two XIN's.
The DIX4192 is bound to provide more interesting, hidden surprises; I haven't spent nearly enough time on it -- certainly far less than the earlier proposed DIR9001.
Cheers
R7 can be omitted. CXD8003 pins 24, 25, 26, and 27 will only provide a signal if that oscillator (pins 25 and 26) is running, probably as originally connected.
The problem with that would be the same trouble the design now faces -- incoming S/PDIF comes with its own clock, and it won't be frequency OR phase-matched with the TCXO. And that is the case whether the 11.2896 MHz comes from a crystal that the 8003 drives, OR a separate TCXO.
I'm pretty sure it would be at least worth trying driving both XIN's (CXD1244 pin 9, 8003 pin 22) with the recovered MCK from the S/PDIF receiver. Aren't both of those IC's still connected much as in the original equipment? Just defeat the 3/2CLK loop and run a jumper between the two XIN's.
The DIX4192 is bound to provide more interesting, hidden surprises; I haven't spent nearly enough time on it -- certainly far less than the earlier proposed DIR9001.
Cheers
No accumulation without speculation ? Maybe but,
would it not be easier to just do things right in the first place ?
....I'm pretty sure it would be at least worth trying driving both XIN's (CXD1244 pin 9, 8003 pin 22) with the recovered MCK from the S/PDIF receiver. Aren't both of those IC's still connected much as in the original equipment? Just defeat the 3/2CLK loop and run a jumper between the two XIN's.
would it not be easier to just do things right in the first place ?
Yes, thank you!
But i have many doubts on the pin 13 of the DIX4192, i will conect to a second oscillator? or i will connect together with pin25?? for the use of the recovered clock on pin 12(RXCKO) for the CXD1244 + CXD8003?
What the yours suggestions about the correct connections on al ic´s??
Thanks for all Help(and patience with me 🙂.
But i have many doubts on the pin 13 of the DIX4192, i will conect to a second oscillator? or i will connect together with pin25?? for the use of the recovered clock on pin 12(RXCKO) for the CXD1244 + CXD8003?
What the yours suggestions about the correct connections on al ic´s??
Thanks for all Help(and patience with me 🙂.
Hi herrero,
I was hoping rfbrw would check in and give us the details . . I certainly don't know what ".. easier to just do things right .." amounts to for this combination of parts -- especially the DIX4192. I'm still trying to figure out what the reason was for changing from the DIR9001. Do you expect to need four differential inputs, or the Transmit facilities, for example? Hope you saw that it needs a microcontroller to do a bunch of housekeeping and setup.
I guess I could re-read the thread from the beginning . . I'll keep checking in every day or two. Given enough time (and your patience) maybe I'll eventually know something about these parts to contribute! 😉
Cheers
I was hoping rfbrw would check in and give us the details . . I certainly don't know what ".. easier to just do things right .." amounts to for this combination of parts -- especially the DIX4192. I'm still trying to figure out what the reason was for changing from the DIR9001. Do you expect to need four differential inputs, or the Transmit facilities, for example? Hope you saw that it needs a microcontroller to do a bunch of housekeeping and setup.
I guess I could re-read the thread from the beginning . . I'll keep checking in every day or two. Given enough time (and your patience) maybe I'll eventually know something about these parts to contribute! 😉
Cheers
Last edited:
The CXD1244 expects 16bit right-justified data with bitclock at 48Fs. The DIR9001 cannot meet this specification. The DIX4192 can because it can operate its audio ports in slave mode and operate LRCLK and BCLK as inputs.
The inputs are very flexible too, with options of diferencial, no diferencial, optical, coaxial...
The other I2S/EIAJ port i will connect on the Xmos XU208 USB module (Available on Ebay)
All functions are controlled by uC.
I have started in the program for tests, and i will purchase in Digikey some DIX1492.
The other I2S/EIAJ port i will connect on the Xmos XU208 USB module (Available on Ebay)
All functions are controlled by uC.
I have started in the program for tests, and i will purchase in Digikey some DIX1492.
Thank you rfbrw! Now I understand. Sorry 😱 -- I can be kinda thick about some of this, especially when the data PDF's total some 107 pages.😱 Guess I'd better get busy.
I'm still a little worried about the tiny package and its 0,5mm-spaced leads, but that's probably just me ..
Best Regards
I'm still a little worried about the tiny package and its 0,5mm-spaced leads, but that's probably just me ..
Best Regards
Last edited:
- Home
- Source & Line
- Digital Line Level
- Please Help for SPDIF interface on TDA1541 dac