The Well Tempered Master Clock - Building a low phase noise/jitter crystal oscillator

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The attached picture shows the simulation of the Pierce oscillator at 11.2896 MHz using a pair of unbuffered '04. The first is used as the active device for the oscillator, the second as the squarer.

The circuit was simulated at 5V with the spice model of the 74HCU04, but could be used also at 3V3, with the 74LVCU04 or the Potato logic unbuffered inverter.

Green plot is the output of the squarer, red plot is the output of the oscillator, light blue plot is the input of the first gate, blue plot is the current flows in the crystal. The crystal dissipates around 350uW. The drive level can be decreased simply changing the value of a resistor.
The crystal load is around 17pF, as for the Laptech specs (16.5pF).
The wave-shape looks nice, Andrea. But what about phase-noise, have you been able to measure that , yet?
 
Is it possible to lock in an oscillator with a higher frequency eg 22mhz using a PLL and lower frequency clock eg 5-6 MHz in order to improve the close in phase error? If so can thi s circuit be created with the Rutgers circuit as a building block? and then what?


Room treatments for headphone users

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Hey brother, how're you doin...

Look, it is probably just me....but your question just doesn´t make any sense to me...
What is the objective of your design? what are you tryin a achieve?
 
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Hi Alexiss & all,

....If you/one of you can draw up a schematic for a 24.576 MHz Pierce oscillator (which could also be of interest to me personally) I will make a PCB layout (for you to comment on if you so wish), make the PCB (70um copper, ~0.2mm base material thickness, FR4, "hand made vias") and mount it with the best possible components for this purpose (some advice will be needed here on critical components).

.......

Jesper

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Hej Jesper...
The higher frequencey clocks, (24.576) as apposed to 11.2896 will have higher phase noise.
It would not be comparatively correct to measure two oscillators with different frequencies or xtals.

But if you need to modifiy the RutgerS to accomdate a 24.576 MHz xtal....just send me an email...

cheers
 
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Demian, Herbert, Alex, Jesper, and so on,

...Since we don't care the aging of the crystal, we could choose a high drive level, that usually means lower phase noise....

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Hello Andrea.

Unfortunately this is an incorrect assumption.

Exceeding the maximum DL is a BAD idea.

The max DL is the Mechanical-Elasticity-Limit of the quartz blank. It is there for a reason.

An exceedingly high DL, will lead to small surface-fractures.
It will also lead to partial evaporization of the surface-etched electrodes, and elevated levels
of gas-contamination inside the holder.
These mechanisms WILL in-time damage the substrate.

There is an optimal operating range for the xtal unit, defined as Normal operating Range (see pic belw)
The motional resistance (R) will have a fairly constant behavior within this region (at least, this should be important to you.)

Exceeding the max DL will lead to increased R, increased heat dissipation in the substrate, and in some oscillators,
even spurious freq jumps, replacing the main selective-mode.
 
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Resistance vs Drive Level

Xtal ESR vs Drive Level
 

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  • drive-level-vs-resistance.gif
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Hey brother, how're you doin...

Look, it is probably just me....but your question just doesn´t make any sense to me...
What is the objective of your design? what are you tryin a achieve?



The objective is to improve the close in phase noise of a higher frequency clock using a lower (eg 1/2 or 1/4 ) frequency clock.
 
....The 74HC04 gives larger delay which is helpful for the isolation of the 'world behind' the oscillator and the oscillator.
I mean the buffer function. The oscillator does not see its load and the other disturbing digital signals like audio related data.....
....
Herbert.
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Hello Herbert and I hope everything is fine with you.



74HC inverters do not provide good isolation, that is the reason why you NEVER see them in precision
oscillators, specially as buffers or isolators.

Their additive PN is not easy to measure, however it is easily audible (you can easily hear it in your audio system).

Measurements of the RutgerS Clock show comparison of LT1016 vs 9 stages of inverters inside the 3 cascaded 74HC04:s....
...just take a look at the internal circuitry of LT1016 and you'll understand why the 74HC04 measured better...

Skewing of the clock flanks (meaning using slower devices) will lead to higher jitter-content in the
clock signal, presented to the next stage, not necessarily to the clock signal itself.

Why?? read-on...

The final jitter reaching your DAC IC is much more dependent on the Input-Referred-Noise-Density and
the related Noise-Bandwidth of the DAC's clock-input stage.

These parameters are made far worse by the physical leakage mechanisms of other active, on-chip,
functional-blocks (unavoidable in IC's).

This means you do not necessarily need to make the clock flanks faster than necessary.

I think the best way to measure the effects of PN of your favorite clock on the audio signal would be to perform measurements on
the analog signal on the output of the DAC chip.

RutgerS is already an excellent clock for audio.
I am certain it will measure even better with a properly designed buffer, and correctly biased resonator (decreasing the DL).

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Keep up the good work, Gentlemen.
 
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Hello Herbert and I hope everything is fine with you.



74HC inverters do not provide good isolation, that is the reason why you NEVER see them in precision
oscillators, specially as buffers or isolators.

Their additive PN is not easy to measure, however it is easily audible (you can easily hear it in your audio system).

Measurements of the RutgerS Clock show comparison of LT1016 vs 9 stages of inverters inside the 3 cascaded 74HC04:s....
...just take a look at the internal circuitry of LT1016 and you'll understand why the 74HC04 measured better...

Skewing of the clock flanks (meaning using slower devices) will lead to higher jitter-content in the
clock signal, presented to the next stage, not necessarily to the clock signal itself.

Why?? read-on...

The final jitter reaching your DAC IC is much more dependent on the Input-Referred-Noise-Density and
the related Noise-Bandwidth of the DAC's clock-input stage.

These parameters are made far worse by the physical leakage mechanisms of other active, on-chip,
functional-blocks (unavoidable in IC's).

This means you do not necessarily need to make the clock flanks faster than necessary.

I think the best way to measure the effects of PN of your favorite clock on the audio signal would be to perform measurements on
the analog signal on the output of the DAC chip.

RutgerS is already an excellent clock for audio.
I am certain it will measure even better with a properly designed buffer, and correctly biased resonator (decreasing the DL).

--------------------------------
Keep up the good work, Gentlemen.
Thanks for this explanation, Alexiss.

One question: You mention measuring the PN effects after the DAC. Would that imply a standardization of the DAC (and it's implementation) with which the effects are to be measured?

Cheers,
Edwin
 
Hi esgigt...

...I am not sure if I understand your question correctly, but I don't think that it is necessary to standardize
DACs and measurements.

Just observing the sidebands generated on the reproduced single-tone signals on the DAC output will serve
as a better indicator of the jitter performance of the entire chain (clock signal inside the IC + DAC), as this
will be system-dependent.

As audio guys, I think this should be more important to you than going all-out trying to reduce SSB-Noise figures
on the oscillator output (these are already very good indeed in the RutgerS).
 
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Hi esgigt...

...I am not sure if I understand your question correctly, but I don't think that it is necessary to standardize
DACs and measurements.
I guess you did understand my question as I intended it to be... ;)

Just observing the sidebands generated on the reproduced single-tone signals on the DAC output will serve
as a better indicator of the jitter performance of the entire chain (clock signal inside the IC + DAC), as this
will be system-dependent.
Actually I have no idea how much jitter and other junk a DAC adds to the audio signal... I also assume that different DAC's have their individual contribution to distortion products. That's why I asked.

As audio guys, I think this should be more important to you than going all-out trying to reduce SSB-Noise figures
on the oscillator output (these are already very good indeed in the RutgerS).
True... the end-result is what matters most.
 
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... of the jitter performance of the entire chain (clock signal inside the IC + DAC), as this
will be system-dependent.

Good point. I stated this several times in other threads, but people continues to see the audio chain as separate devices, not as a system.

I would think to a system, from the source to the DAC output. I would feed the DAC directly by the master clock slaving the source. But this implies to develope an entire digital system. Someone skilled in uC and FPGA could develope such system, rather than design separate devices (USB to I2S, FIFO, R2R DAC and so on).

BTW, a good master clock is a must also in the above way.
 
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@Andrea:

I would feed the DAC directly by the master clock slaving the source. But this implies to develope an entire digital system. Someone skilled in uC and FPGA could develope such system, rather than design separate devices (USB to I2S, FIFO, R2R DAC and so on).

Hi Andrea ... Interesting thought that I do much agree with. On a smaller scale - and not optimized - I've experimented with this using the Amanero Combo 384 where I removed the original oscillators from the Amanero board and instead fed the clock that comes from the oscillators feeding the DAC. This worked and to my ears has some quite unusual sound qualities.

However, IMHO there's a current "undesirable" state of things in that the audio systems use both 22.*** MHz and 24.*** MHz clocks. Not least because the frequencies are quite close and I reckon that - with the possible exception that one of the frequencies might be more consonant e.g. with current Western World tone tuning - the difference is negligible. Thus one frequency IMHO would be desirable.

As it is now the ability to make a quality switch between two close-by frequencies is necessary.

Cheers,

Jesper
 
@Andrea:


... However, IMHO there's a current "undesirable" state of things in that the audio systems use both 22.*** MHz and 24.*** MHz clocks. As it is now the ability to make a quality switch between two close-by frequencies is .........
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Jesper, this is really not a problem that cant be solved.

You can have two low jitter clocks (RutgerS 22...MHz & RutgerS 24... MHz) running on a common platform with minimal interference.

The question is: why would you want to?
Cheers....
 
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...With Tentlabs/GrimmAudio we think that audio-related jitter on the master clock oscillator is most serious. .....

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This is exactly in accordance with my own observations.




...This happens at phase modulation frequencies of a few Hz.
A jitter-poor oscillator in this frequency range makes a better sound of the (unplugged) instruments and a more precise sound stage....

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This is where I get lost....I cannot understand nor explain the realtionship...
 
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I'm not sure I fully understand this claim but it seems to be that random frequency modulation in the 1 Hz to 100 Hz (?) is audible at what are very low levels. I think its fair to say these variations are as much as 100 dB smaller that the wow and flutter of a conventional turntable or tape transport. This is why I think a real effort needs to be made to test and quantify audibility.

This modulation should be pretty easy to spot as sidebands on a carrier in the analog output. Possibly a low frequency carrier (100 Hz) would show them more but they should be present on a 1 KHz carrier. Another way would be to look at the time interval variation on a 1 KHz tone. This would be more sensitive to cycle to cycle variations.

However I may have completely misunderstood this.
 
I'm not sure I fully understand this claim...
...This modulation should be pretty easy to spot as sidebands on a carrier in the analog output....
However I may have completely misunderstood this.

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well, Herbert is saying that an inferior oscillator at these low offsets produce more natural sound!!!
Look at the above-mentioned text... maybe he means the opposite??
 
Phase Noise Predictions Poll

Allright gentlemen.

As you know by now, Andrea is planning on performing comparative
measurements on 4 oscillator configurations.

These are:
1. RutgerS
2. Driscoll
3. Pierce
4. Butler (aka common-base)

Thanks to the input from everyone here, this thread is quickly becoming one the best sources
of collected information on audio-related oscillator design (many thanks to Andrea).

In the true spirit that started this thread, let us gather our knowledge and predict which oscillator-design
you think would come out as the victor and why.

So far it seems that the close-in phase noise is the most important parameter for digital audio
reproduction quality.

RutgerS oscillator has excellent close-in phase noise measurement.
However, I will place my bet on the Driscoll as number 1, with the Pierce coming to a very close second.

Why??
I believe the Driscoll produces the highest Loaded Q than any other circuit and a 11.2896 MHz AT-cut Driscoll
will be the winner.

As mentioned earlier, the Pierce mechanism, along with its class-A operation, and its way of using the resonator, allows
for tighter control of the resonance frequency than the Clapps-type, hence leading to better PN performance.


What are your ideas??


.
 
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