How about now? 🙂
I did couple of simple tests today, so far looks good. Need to update firmware a bit to support full duplex mclk line.
Hello,
It requires 1024fs clock option (by default it is 512fs).
24 bit/channel, 64 bits/frame
I mean USB stream data. Does the device receive data from PC for 8 channels mode as 384 kHz@16 bits and then output stream as 384 kHz@24 bits by adding one 0-value byte?
Sorry for delay. About a year ago while debugging this part I monitored size of audio samples packets received by PIC32 PHY. I do remember for 48k it was 6 samples/transaction (from the PHY) or 48 bytes, which makes sence. For 8 channels at 384k I'll have to check again how it is handled.
But since FIFO size is 1024 bytes and wMaxPacketSize in the descriptor set to 1024 accordingly, It appears that answer would be "yes".
So, the isolated version is tested and the firmware for it is updated 🙂
There were also couple of things to fix in the bootloader and I still have couple of things to do to make support of now 4 different hardware options in the firmware. I've finally implemented BSPs (Board support packages).
(As an option I put pads for ufl connectors and option to provide external supply for the USB side)
I also tested it with the reclock interposer board I posted above, everything works fine.
With that board York is configured to receive masterclock from isolated (DAC) side, on board oscillators are disabled in such case.
So it looks like this:
Use of external oscillators is not strictly necessary, the hardware supports full duplex operation on mclk line. So York can provide masterclock from the oscillators to the isolated side as well.
Such implementation of the reclock should be better than just FPGA: it uses one IC for all signals and each path has the same delays. Whereas FPGA implementation would always have slightly different delays based on how the place-and-route is done. In many DACs such reclocking scheme is used even after FPGA.
This is only important for the PCM DACs, of course.
There were also couple of things to fix in the bootloader and I still have couple of things to do to make support of now 4 different hardware options in the firmware. I've finally implemented BSPs (Board support packages).
(As an option I put pads for ufl connectors and option to provide external supply for the USB side)
I also tested it with the reclock interposer board I posted above, everything works fine.
With that board York is configured to receive masterclock from isolated (DAC) side, on board oscillators are disabled in such case.
So it looks like this:
Use of external oscillators is not strictly necessary, the hardware supports full duplex operation on mclk line. So York can provide masterclock from the oscillators to the isolated side as well.
Such implementation of the reclock should be better than just FPGA: it uses one IC for all signals and each path has the same delays. Whereas FPGA implementation would always have slightly different delays based on how the place-and-route is done. In many DACs such reclocking scheme is used even after FPGA.
This is only important for the PCM DACs, of course.
hoi =)
Maybe a stupid question; why not make the clocks upgradable?
Got a couple of amanero (clone)/xmos cards to test out for a new project and they all have either sockets or pads for different size clocks. Just to have some thinking fun and see where it leads to.
BTW like the daughter card as it looks like it changes the mounting direction; something I require for the upcoming project (internal USB connection).
Maybe a stupid question; why not make the clocks upgradable?
Got a couple of amanero (clone)/xmos cards to test out for a new project and they all have either sockets or pads for different size clocks. Just to have some thinking fun and see where it leads to.
BTW like the daughter card as it looks like it changes the mounting direction; something I require for the upcoming project (internal USB connection).
Hoi 🙂
+7050/5032 etc SMD footprints. But I was in a bit of hurry to send it to production. But if you have an idea what it can look like - please let me know 🙂
For the board posted above (BTW, I'm attaching the schematic just in case someone is interested) I was thinking about something like that:
+7050/5032 etc SMD footprints. But I was in a bit of hurry to send it to production. But if you have an idea what it can look like - please let me know 🙂
Then perhaps the nano version is better in that case because it has USB routed to 2.54mm header (hidden under the USB socket):
The ISO version is now available on Tindie 🙂
https://www.tindie.com/products/eclipsevl/multichannel-usb-to-i2s-uac2-interface-york/
https://www.tindie.com/products/eclipsevl/multichannel-usb-to-i2s-uac2-interface-york/
Hi @eclipsevl,
I looked through your user manual and realized that the setting up of the power supplies were not mentioned.
Can you provide some guide on how to power the USB with an external PSU, and also how to supply the 'clean side'? This clean supply is 3.3V or 5V?
Thanks.
Yeah those are fine; there's even nice sockets for clocks; https://www.audiophonics.fr/en/diy-...k-upgrade-kit-kor-denafrips-ares-p-19898.html (totally overpriced PCB btw).
As for my project, haven't decided what way to go yet so thus far anything could still work really.
More concerned about power supplies and dimensions as those worry me a bit.
Have look on the back of this board and you will find jvbus. It's soldered jumper if you feed power through usb port. If you want to connect external 5v psu you need to desolder this jumper and connect psu to vsup pin.
Clean side should be supplied with 3.3v.
I agree that manual should be upgraded. I just purchased myself this card together with reclock board.
My question is can we replace these oscillator on reclock board with let say NDK NZ2520SDA?
If I want to use external master clock what parameters should that be? My dac don't provide mclk.
if I understand correctly without mclk fed from dac or external clock I need to set clocking from on board oscillators or PLL and then it will generate mclk that will go through recklock board? That way I can use outputs from reclock board to feed 2ch i2s to df1704 or 2ch nos?
Hello @MarcinGD
Guys, you are absolutely right about documentation. I've been answering some questions in PM and that actually helped me a lot to understand what should be in the documentation. Thank you so much, the manual for ISO and reclock board will be published this week.
That is correct.
actually 3.3 to 5.0v, the isolation ICs allow that.
The board is designed for oscillators in 3225 package but I think it will be possible to solder 2520 as well. I'll check.
Let me add more details in the manual regarding that.
Guys, you are absolutely right about documentation. I've been answering some questions in PM and that actually helped me a lot to understand what should be in the documentation. Thank you so much, the manual for ISO and reclock board will be published this week.
Hello Vladislav,
how is the dsd pin managed on YORK ? , I want the YORK card to be inactive when I am not using the USB input.
Best Regards,
Serge B.
how is the dsd pin managed on YORK ? , I want the YORK card to be inactive when I am not using the USB input.
Best Regards,
Serge B.
Hello Serge,
In 2ch I2S configuration it indicates whether the output is DSD stream (1 = DSD, 0 - PCM).
Please clarify. You don't want the York to be recognized on PC when it is not used?
Yes, it is possible to solder this oscillator (2520 package).