What could you gain with the circuits..?
Behind those clocks there is a true professional producer, with long scientific history and real production.
There are also patents involved so I don't think you will get an easy access to the circuitry.
Here is a list of their pubblications:
http://magicxtal.com/customer/?SECTION_ID=44
Behind those clocks there is a true professional producer, with long scientific history and real production.
There are also patents involved so I don't think you will get an easy access to the circuitry.
Here is a list of their pubblications:
http://magicxtal.com/customer/?SECTION_ID=44
Okay, understood. Andrea's FIFO buffer can run on external clocks such as Andrea's, or any that can drive the external inputs (which are probably 50-ohm) or there are pads on the PCB to install clock modules such as Crystek, Accusilicon, NDK SDA, etc.
The Lite version FIFO buffer board only accepts I2S digital audio input signals. So it means you would need to source a SPDIF receiver that outputs I2S.
In that regard I haven't looked at the documentation for Ian's SPDIF receiver to see what it outputs, what power it needs, etc. If I can help with figuring it out, I would be willing to take a look. Otherwise you could contact Ian here in the forum, and or Andrea (at his website) to ask questions.
Anyway, my guess is that its probably doable. Also IIRC, Andrea's FIFO board can be configured to drive many types of dacs which require particular input signal protocols. Andrea would probably be the best person to ask about that.
Another thing you would need to know is what frequency clocks your dac needs. Then you can decide on which clocks you would like to use. If you then decide later you want to upgrade clocks, that should be possible too.
Can't think of anything else to mention right now.
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Not sure what you mean by the above. Any clocks you buy from anyone are usually pre-made (or else partially pre-made, and you can finish the rest). Completed clock oscillator boards with crystals can be measured for phase noise performance if you want to pay someone to do it. Andrea or other people can do it if you want.
More specifically, the way it works with Andrea's clocks is that the clock boards and crystals are sold separately. Crystals come from a company that makes good ones, S-cut, etc., but there is a MOQ (minimum order quantity) they require for custom crystal orders. Depends how many people want particular frequency crystals. If not enough people sign up for particular crystals then the MOQ may not be met. Again, its something to ask Andrea about. Depending on the crystal you get it will affect final measured performance. However, I think they are all guaranteed to meet a minimum spec, which is basically at what is generally considered SOA.
There is also the possibility to buy SOA clocks from Acko DAC company in Australia. Again, every crystal is different and it costs extra to have final measurements done because it takes time. Same for any clocks, so far as I know. IIUC Acko paid extra to get the entire first batch of clocks measured. That includes the pair I have. Don't know his plans for subsequent production. Its something you might want to talk to him about.
Also IIRC, there are other companies that can make high performance clock modules. MagicCrystal may be one. When I looked into that previously there was a MOQ on clock modules if going that route. Basically, SOA audio frequency clocks are small-volume, custom-made devices.
Mass produced clocks such as Accusilicon, Crystek, NDK SDA, are a different story. Phase noise is higher than SOA, but they still have lower close in phase noise than so-called "standard" clocks.
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Andrea sourced the crystals from Laptech in Ontario Canada, now owned by https://rfx.co.uk/. Laptech has been in business for 40 yrs supplying telco, space and medical industries.
Hi! Nothing, just asking because I don´t know. When I have seen those OCXOs I thought it was just the crystal, but I suppose the circuit is inside the CAN....
Hi Mark, thanks a lot for your detailed replies...but I think I am not explaining myself correctly....
On one side I am carrying out the mod of my SPDIF input TDA1541 DAC using Andrea FIFO and DRIXO. The mod consists of placing Andreas FIFO between the cs8414 and the TDA1541 and then reclocking the output signal coming from the CS8414 before entering the TDA. For doing so, I have drawn a simple PCB with the help of a forum member. It is a kind of breakout board that must be placed in the original TDA socket. This weekend I am placing the order in PCBWay. I wanted to make usb or i2s input but I have decided to keep the DAC as is without breaking anything....
On the other side, I am designing my pc transport and I need again an spdif output to feed the TDA dac, and was considering using the new Andrea USB board for building an usb2spdif inside the pc transport. This transport will be used with the Sonic Empire DAC when released via USB/I2S, but now want to add an spdif output for connecting my TDA dac as well.
So my first question was about using Andreas USB with Ians TransportPiAES or HDMIpro to get this......
jmmbarco,
Just to make sure I am understanding you correctly this time, could I ask you to draw a block diagram (a pic of a pencil drawing would be fine) of the signal flow you want for now, including flow in and out of your adapter board (with arrows showing direction of signal flow)?
An example of one type of simple block diagram (just some boxes and arrows):
Regarding plans for implementing a Sonic Empire dac, I would not recommend making any specific plans for that yet. The reason is that optimal implementations of Sonic Empire technology may not physically be what you are thinking of now. One reason for that is because of a need for more optimal immunity to radiated EMI/RFI.
Just to make sure I am understanding you correctly this time, could I ask you to draw a block diagram (a pic of a pencil drawing would be fine) of the signal flow you want for now, including flow in and out of your adapter board (with arrows showing direction of signal flow)?
An example of one type of simple block diagram (just some boxes and arrows):
Regarding plans for implementing a Sonic Empire dac, I would not recommend making any specific plans for that yet. The reason is that optimal implementations of Sonic Empire technology may not physically be what you are thinking of now. One reason for that is because of a need for more optimal immunity to radiated EMI/RFI.
This is the original PCB
Below is the modded. First you uninstall the TDA IC from its original socket and place it in the breakout pcb socket, labelled TDA1541(A). The breakout pcb is connected to the DAC pcb via 10mm header pins from the DIP28 footprint labelled ABBAS.
The pcb reroutes the input I2S signal coming into the socket pins to the 8p XH connector, which is connected to the FIFO inputs. Then the FIFO u.fl outputs are connected to the u.fl connector in the breakout pcb.
Just to make sure there were no ground loops I have placed a simple isolator circuit for the FIFO input signal based on ISO7230MDW. This way FIFO GND connects into a single point. This isolator circuit will be powered with a separate winding plus a little shunt regulator and a DC-DC isolator (CME0505S3C).
Below is the modded. First you uninstall the TDA IC from its original socket and place it in the breakout pcb socket, labelled TDA1541(A). The breakout pcb is connected to the DAC pcb via 10mm header pins from the DIP28 footprint labelled ABBAS.
The pcb reroutes the input I2S signal coming into the socket pins to the 8p XH connector, which is connected to the FIFO inputs. Then the FIFO u.fl outputs are connected to the u.fl connector in the breakout pcb.
Just to make sure there were no ground loops I have placed a simple isolator circuit for the FIFO input signal based on ISO7230MDW. This way FIFO GND connects into a single point. This isolator circuit will be powered with a separate winding plus a little shunt regulator and a DC-DC isolator (CME0505S3C).
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Okay. I would suggest to talk to Andrea about it. IIRC, the signals you are taking from the FIFO board need to be reclocked by MCLK and galvanically isolated.
Again, from memory, the only truly clean signal from the FIFO board is MCLK. Andrea makes an isolated reclocker board (OIR) that I used for external clocking of MarcelvdG's RTZ DSD dac. For his own DACs, Andrea does galvanic isolation and reclocking on the DAC board.
When I used the OIR reclocker/isolator board with Marcel's dac, I had to modify the OIR. There were two problems. The OIR board was not originally designed for use with the FIFO board. Thus it has parallel termination at the end of the MCLK line. Since the FIFO board uses series termination at the source, to make it work I cut the trace to the OIR parallel termination. Also there was an issue having to do with square wave symmetry with one of the signals. To fix that I needed to invert MCLK. There was a spare inverter on the OIR board anyway, so a simple trace cut and a jumper fixed that. Later when using the OIR in a different way, I didn't want the inverted MCLK so I removed the jumper and put a solder bridge across the trace cut I previously made.
Again, from memory, the only truly clean signal from the FIFO board is MCLK. Andrea makes an isolated reclocker board (OIR) that I used for external clocking of MarcelvdG's RTZ DSD dac. For his own DACs, Andrea does galvanic isolation and reclocking on the DAC board.
When I used the OIR reclocker/isolator board with Marcel's dac, I had to modify the OIR. There were two problems. The OIR board was not originally designed for use with the FIFO board. Thus it has parallel termination at the end of the MCLK line. Since the FIFO board uses series termination at the source, to make it work I cut the trace to the OIR parallel termination. Also there was an issue having to do with square wave symmetry with one of the signals. To fix that I needed to invert MCLK. There was a spare inverter on the OIR board anyway, so a simple trace cut and a jumper fixed that. Later when using the OIR in a different way, I didn't want the inverted MCLK so I removed the jumper and put a solder bridge across the trace cut I previously made.
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LRCK is optically isolated and relocked from external clocks as well. In fact OIR is recommended when reclocking bck is needed, which is not the case of a tda1541. Andrea recommends the OI board fot a TDA which just provides optical isolation from FPGA on the "dirty" side.
For simplicity I had decided not to use it, as phase noise performance was not degraded, but maybe I should reconsider....
For simplicity I had decided not to use it, as phase noise performance was not degraded, but maybe I should reconsider....
Okay. At the very least its probably a good idea to use isolators, otherwise the I2S signals will have common mode noise on the ground that goes all the way back to the SPDIF source.
Regarding phase noise on I2S signals and your particular dac, don't have any personal experience with it myself. That being the case and for one-off project, I would probably be inclined to play it safe and reclock. However, that's just me. If Andrea says no reclocking is needed, that's fine too.
EDIT: Also, probably wouldn't use a DC/DC converter anywhere myself. Problem is that they can generate common mode noise up around 1-2MHz that can then get into other parts of the dac. Again, isolators can help but some of the noise may also be radiated and thus able to jump across a typical galvanic isolation gap. Have verified it can happen in multiple cases with extensive experiments and measurements. I believe Andrea has seen some of it too, which is why I said I think there may be some physical differences with Sonic Empire tech. Of course, doesn't mean there would be an audible problem in this case, only that its been known to happen in some other cases.
Regarding phase noise on I2S signals and your particular dac, don't have any personal experience with it myself. That being the case and for one-off project, I would probably be inclined to play it safe and reclock. However, that's just me. If Andrea says no reclocking is needed, that's fine too.
EDIT: Also, probably wouldn't use a DC/DC converter anywhere myself. Problem is that they can generate common mode noise up around 1-2MHz that can then get into other parts of the dac. Again, isolators can help but some of the noise may also be radiated and thus able to jump across a typical galvanic isolation gap. Have verified it can happen in multiple cases with extensive experiments and measurements. I believe Andrea has seen some of it too, which is why I said I think there may be some physical differences with Sonic Empire tech. Of course, doesn't mean there would be an audible problem in this case, only that its been known to happen in some other cases.
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Hi Mark. You were right in all actually....In standard I2S output signal come from the dirty side so best option is to use OIR to reclock them all. Only in simultaneous mode with stopped clock (which I don´t know what it exactly is...), LRCK comes from the clean side of the FIFO, in this mode OI is recommended for isolation only. At least I can power the OIR from the same regulator.... 
Regarding the use of a DC-DC isolated converter what do you suggest me to do? I think that best option then, should be to power both sides of the isolator in the PCB independently, instead using DC-DC. For example, I could use the DC out in the FIFO for one side, and the dedicated rail, that before was used to power the DC-DC, for the other (the one is "touching" the TDA).
What do you think??
Regarding the use of a DC-DC isolated converter what do you suggest me to do? I think that best option then, should be to power both sides of the isolator in the PCB independently, instead using DC-DC. For example, I could use the DC out in the FIFO for one side, and the dedicated rail, that before was used to power the DC-DC, for the other (the one is "touching" the TDA).
What do you think??
Guess I'm not clear on why you need the isolator on your adapter board if you are going through the FIFO buffer and then through an OIR? I kind of assumed it would only be populated if you weren't using the FIFO.
In my own case if I need isolated power, I generally use a dedicated transformer winding and regulator for that.
Maybe the reason you have two rows of pins on your isolator board is so you can offset it one way or the other to use the FIFO and OIR, or else use the on-board isolator? If so, then the dirty side of the isolator could run on whatever dirty power you have on that side. Same for the clean side, use whatever clean power you have.
In my own case if I need isolated power, I generally use a dedicated transformer winding and regulator for that.
Maybe the reason you have two rows of pins on your isolator board is so you can offset it one way or the other to use the FIFO and OIR, or else use the on-board isolator? If so, then the dirty side of the isolator could run on whatever dirty power you have on that side. Same for the clean side, use whatever clean power you have.
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It is not a double row of header pins. It is two overlapped DIP28 sockets:
All pins are connected in parallel excepting the I2S pins (1-4). It is actually the main idea of the adapter board:
In this topology, if no isolator is installed between the XH and the FIFO input, wouldn´t a ground loop be created?
- In the upper one, labelled ABBAS, 10mm header pins are installed at the bottom of the PCB to connect to the original DAC PCB socket.
- In the lower one, labelled TDA1541(A), a DIP28 socket is installed at the top of the PCB to place the TDA1541 IC.
All pins are connected in parallel excepting the I2S pins (1-4). It is actually the main idea of the adapter board:
- I2S 1-3 pins of the upper DIP28 are connected to the XH connector, and then to the FIFO input (any).
- I2S 1-3 pins of the lower DIP28 are connected to the u.fl connectors coming from the FIFO output u.fls.
In this topology, if no isolator is installed between the XH and the FIFO input, wouldn´t a ground loop be created?
The only three lines through the isolator go to pins that wouldn't be connected to the anything unless that one of the 'overlapped' sockets was plugged into something. However, if no isolator was used then a ground for the I2S signals would be needed to carry across as well, but it could be enabled or disabled with a jumper.
The main difference would be when using the dac without the FIFO an OIR, then the ground jumper would have to be on, which means the dac is exposed to the SPDIF source ground common mode noise. OTOH, using an isolator would add a little jitter, but would provide galvanic isolation. Therefore, I'm guessing that in most cases it would probably be better to have the isolator if there is no FIFO and OIR.
As to whether there is a ground loop or not, there would be one if both the SPDIF source and the DAC were connected to AC power ground. However, that ground loop could be broken by using a pulse transformer between the SPDIF input connector and the SPDIF receiver IC. There are little transformers made especially for that purpose. Could still be that some HF common mode noise would make it through the pulse transformer depending on its design. If there is no electrostatic shield between primary and secondary windings then there would be some possibly significant capacitive coupling between them. Have to try it and see if any problem.
The main difference would be when using the dac without the FIFO an OIR, then the ground jumper would have to be on, which means the dac is exposed to the SPDIF source ground common mode noise. OTOH, using an isolator would add a little jitter, but would provide galvanic isolation. Therefore, I'm guessing that in most cases it would probably be better to have the isolator if there is no FIFO and OIR.
As to whether there is a ground loop or not, there would be one if both the SPDIF source and the DAC were connected to AC power ground. However, that ground loop could be broken by using a pulse transformer between the SPDIF input connector and the SPDIF receiver IC. There are little transformers made especially for that purpose. Could still be that some HF common mode noise would make it through the pulse transformer depending on its design. If there is no electrostatic shield between primary and secondary windings then there would be some possibly significant capacitive coupling between them. Have to try it and see if any problem.
No worries Mark... the point is that I am not really sure you understand what I am trying to do. Very probably the problem is that I cannot explain clearly the idea.
Please, take a look to this site. https://www.bramjacobse.nl/wordpress/?p=6035
Basically "my" adapter board is like the DEM MOD.
So getting back to the subject, if I connect the OIR+FIFO to the ufl connectors and, at the same time, the xh connector to the FIFO input without any kind of isolation, TDA1541 digital GND (pin14) is connected to both the dirty and the clean side of the FIFO. Isn´t it a potential issue?
Please, take a look to this site. https://www.bramjacobse.nl/wordpress/?p=6035
Basically "my" adapter board is like the DEM MOD.
So getting back to the subject, if I connect the OIR+FIFO to the ufl connectors and, at the same time, the xh connector to the FIFO input without any kind of isolation, TDA1541 digital GND (pin14) is connected to both the dirty and the clean side of the FIFO. Isn´t it a potential issue?