Dddac but with my own motherboard without the shift registers (so practically it’s pcm1794a in external filter mode). at the moment I use my own audio driver for the pi to output i2s with right-justified data, but it would be nice to be able to input standard i2s into the fifo and not depend on custom drivers on the front.
I thought if you implement left justified, the way to implement right justified too might be short
I thought if you implement left justified, the way to implement right justified too might be short
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FIFO Lite work in progress
We are testing micro/FPGA firmware and Windows software.
Next step will be testing some DACs.
I will release the Windows application soon so you can install it.
Windows software allows to install the FPGA firmware and configure the TWSAFB-LT FIFO Lite settings according to the DAC will be driven.
The application can be used in unplugged mode (without the FIFO board connected) in order to understand if your DAC can be driven changing some settings including master clock frequencies.
This allows to check the configuration before getting the board.
We are testing micro/FPGA firmware and Windows software.
Next step will be testing some DACs.
I will release the Windows application soon so you can install it.
Windows software allows to install the FPGA firmware and configure the TWSAFB-LT FIFO Lite settings according to the DAC will be driven.
The application can be used in unplugged mode (without the FIFO board connected) in order to understand if your DAC can be driven changing some settings including master clock frequencies.
This allows to check the configuration before getting the board.
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Looking great! If custom settings are possible i will be golden, with presets only it could be difficult because there are not a Lot of right justified dacs i think. But we'll See. Cant wait to get my hands in the fifo
Edith: the Standard dddac settings wont work because its pretty much Standard i2s (shifting to right justified is done with Shift Registers on the dddac Motherboard),
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Looking great! If custom settings are possible i will be golden, with presets only it could be difficult because there are not a Lot of right justified dacs i think. But we'll See. Cant wait to get my hands in the fifo
Edith: the Standard dddac settings wont work because its pretty much Standard i2s (shifting to right justified is done with Shift Registers on the dddac Motherboard),
So do you need I2S right justified output?
Which DAC are you pointing out?
Ok, sorry I did not see your post.
I have to check the FPGA firmware, I'll let you know.
D
Deleted member 537459
Right justified data
Current firmware version does not support right justified data.
Now we have stopped the firmware development because it's already very complex, so we need to test it deeply.
BTW in the future we can add input and output I2S right justified data support without any hardware upgrade.
FPGA firmware and Windows software update will do the job.
Current firmware version does not support right justified data.
Now we have stopped the firmware development because it's already very complex, so we need to test it deeply.
BTW in the future we can add input and output I2S right justified data support without any hardware upgrade.
FPGA firmware and Windows software update will do the job.
FPGA firmware is encrypted because we would avoid to support custom versions.
Moreover the FPGA communicates with the micro via SPI, so all the settings are managed and stored by the micro (via Windows application) and then they are passed to the FPGA.
Therefore to manage further parameters the communication protocol between Windows application, micro and FPGA has to be updated.
But since we have left a few unused registries for future use we can use them for further implementations avoiding to update the firmware of the micro (pre-uploaded via ICSP before shipping the board).
This way the needed updates can be easily managed by the user by updating the Windows application and uploading the new FPGA firmware (the board will come without the FPGA firmware installed, it will be uploaded by the user via the Windows application).
Moreover the FPGA communicates with the micro via SPI, so all the settings are managed and stored by the micro (via Windows application) and then they are passed to the FPGA.
Therefore to manage further parameters the communication protocol between Windows application, micro and FPGA has to be updated.
But since we have left a few unused registries for future use we can use them for further implementations avoiding to update the firmware of the micro (pre-uploaded via ICSP before shipping the board).
This way the needed updates can be easily managed by the user by updating the Windows application and uploading the new FPGA firmware (the board will come without the FPGA firmware installed, it will be uploaded by the user via the Windows application).
Can you please let me know what Beagle Bone Black version and what software you are currently using?
And what device you are feeding with the BBB output.