SSLV1.1 builds & fairy tales

With 2K dummy load Right channel negative rail
 

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Still problematic.
Merlin, do you have 270R for sure in gate stopper place (parallel on board near the input & output Mosfet pins)? Or something different value by any mistake? Some used before heated cap many times with iron? Because you should have simple line like in your positive pic no problem at least with dummy test.
 
Just did a quick test on a JC2 pre I am doing some tests with.
Negative supply is a flat line with a 20MHz scope set to max.
Probably something is wrong with a resistor, as Salas mentioned. I shouldn' t look at the caps.
 

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Still problematic.
Merlin, do you have 270R for sure in gate stopper place (parallel on board near the input & output Mosfet pins)? Or something different value by any mistake? Some used before heated cap many times with iron? Because you should have simple line like in your positive pic no problem at least with dummy test.

Measured all four gate resistors 270R in the negative rail and all four measure 270R, attached pic right channel negative rail
 

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