I guess some chips like miniDSP uses for DRC and xovers like the Sharc 400MHz used in his MiniDSP 2x4 HD could be enough, the chip itself isn't very expensive. Pjotr and Olo can confirm or offer a better alternative.
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I had another more relaxed listen to my PCM2DSD board last evening, still only via the RC filter 'decoder' and with the headphone amp but with much better headphones and I have to say I found it sounded really very good.
I have some leave coming up in August and plan to invest some of the time assembling another of Marcel's RTZ DACs and hope to be able to compare the PCM2DSD to Pavel's DSD'it.
I have some leave coming up in August and plan to invest some of the time assembling another of Marcel's RTZ DACs and hope to be able to compare the PCM2DSD to Pavel's DSD'it.
Not yet Pjotr. I don't have a means of programming the board to hand currently, so the firmware on my module was installed by fellow UK-based DIY Audio member @Cestrian - I may have to invest in a suitable interface.
Also, I need to try lisitening to the PCM2DSD via a connection to my HQPlayer computer as I haven't been able to try it with native DSD media yet, so can't comment on how it sounds in bypass mode.
Also, I need to try lisitening to the PCM2DSD via a connection to my HQPlayer computer as I haven't been able to try it with native DSD media yet, so can't comment on how it sounds in bypass mode.
I'm sure I can achieve DSD256 with a 4th order by optimizing two channels. With just a little extra effort, DSD256 for a 5th order might also be possible. However, attempting a 6th order seems quite challenging. If I manage to accomplish it, I think I can share them. The good news is that the supply of xc6slx09 has been restored, which is DIY-friendly with its QFP package. Considering common semiconductor knowledge, I thought it might no longer be available.
I've tried creating something like this:
I am currently auditioning the v3 software in parallel with the original v1 on the following rigs. RTZ1 and 2 are both Marcel's excellent RTZ DAC, although the filter boards are not identical:
RTZ1:
RTZ2:
I have a switchbox to easily select between.
I don't have (yet) two of @nautibuoy's reduced filter boards and my other full filter has NE5532 op amps fitted so also not a completely valid comparison.
My amplification and speakers/headphones (or ears!) are probably not up to the standard to really do justice to the auditioning, however, I can detect significant differences between v1 and v3 software and so I'll keep on and try to work out how to describe what I hear.
Ideally, I would like to build another @nautibuoy filter board and ensure that both DACs are as close to identical as possible to rule out the difference introduced by not having the final op-amps and caps.
RTZ1:
- Logitech Squeezebox Receiver I2S
- PCM2DSD (v1 code)
- RTZ DAC
- Full filter board with OPA1678
- Lundahl 1588 line transformers (convert balanced to single-ended)
RTZ2:
- Logitech Transporter I2S
- LVDS to transfer I2S
- PCM2DSD (v3 code)
- RTZ DAC
- Reduced filter board with OPA1678 (@nautibuoy's mod with no final filter stage/output caps)
- Lundahl 1588 line transformers (convert balanced to single-ended)
I have a switchbox to easily select between.
I don't have (yet) two of @nautibuoy's reduced filter boards and my other full filter has NE5532 op amps fitted so also not a completely valid comparison.
My amplification and speakers/headphones (or ears!) are probably not up to the standard to really do justice to the auditioning, however, I can detect significant differences between v1 and v3 software and so I'll keep on and try to work out how to describe what I hear.
Ideally, I would like to build another @nautibuoy filter board and ensure that both DACs are as close to identical as possible to rule out the difference introduced by not having the final op-amps and caps.
One of the things we believe is better about version 3 firmware is the stereo imaging. There is pretty good stereo illusion of sound stage with width and depth.
However, some albums may be recorded with various degrees of imaging. There are at least a few albums where every instrument is hard-panned to one channel or the other. Maybe not a lot of imaging with those.
Also, some systems my be better at rendering a more convincing stereo illusion than others. YMMV.
However, some albums may be recorded with various degrees of imaging. There are at least a few albums where every instrument is hard-panned to one channel or the other. Maybe not a lot of imaging with those.
Also, some systems my be better at rendering a more convincing stereo illusion than others. YMMV.
The Mola Mola DAC uses three 400 MHz SHARCs. One for stereo upsampling and one per channel for bit processing. And then still quite some tricks were required to achieve sufficient precision. So a single chipNu would be underpowered for multi channel. There is a next gen SHARC though with triple core, higher clock speeds and 64 bit float. Also a great platform I would think...
I would have to agree. This is something, now that you draw my attention to it, is superior.
To expand on the rest of my system, I have a Douglas Self Trimodal amp that I built a couple of years ago and a pair of 1990's Ruark Talisman II speakers. So perhaps not very high end but for me, in my small listening room, they give excellent imaging.
Thing is, to achieve that actually requires making various things better. Spatial cues for distance perception involve reproduction of relative phase between channels, air attenuation of HF with distance, low level reverberation details versus direct sound, etc.
If you listen for things you know about such as for example, FR, HD, IMD, etc., then you may miss a lot of the other stuff that's different. Its important to close your eyes, empty your mind of thoughts, and just listen. Experience as much of the sound as your brain can process all at once. There is a whole of information coming in, too much for most people to notice all at once. The brain automatically tends to filter out what it doesn't expect to hear and or filter out what is not of conscious focus. That's why you have focus on nothing at all. Just experience as much as you can of everything at once. Actually, its hard at first and takes practice.
IMHO and IME it can be a lot like mindful mediation, where you try to feel/be-aware-of every part of your body at once. Very slow and deep breaths. Inhale through the mouth and exhale through the nose, or vice versa. Then you start by feeling a distal part of your body, say, maybe your toes, then more of your feet, then up your leg, the back of you knee, the front of your knees, and keep adding awareness of more and more body areas as you go. Soon you will find that you lost awareness of your toes or some other part of your body. Then you have to go back and and practice again from the beginning until you can be aware of everything at once. It will take time and practice to develop, of course.
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BTW, noticed there have been only 15 downloads of version 3 firmware. Wondering if that could be because the FPGA called out in the BOM was shown as out of stock with a long lead time. However, the same chip in the 'I' or industrial temp range version seems to be easily obtainable from authorized distributors. Just picked up three more myself for future projects.
Here is a first schematic of the mainboard I am working on. Design goals:
This is the most complex design I have done so far. I kindly invite your comments and suggestions.
Design notes, numbering corresponding to the goals above:
Ad 1: Dual Crystek CCHD-957s, one of which is enabled by I2SoverUSB. R10 is a pull-up resistor to ensure that only one is running during startup, when the A0_inv signal might float. The default is the 44.1 kHz family, which is what I listen to 99.9% of the time. For that reason I also chose not to leave both running and switching between their outputs. Having only one running also prevents noise going from one to the other through the voltage rail.
A TI LMK1C1103PWR buffer provides three clock copies for each section: input, reclocking and output. It seems like a nice and relatively new (?) part with lower jitter than the popular ON NB3L553. At the input section, an ON NB3N502 sends a copy of the clock reference to PCM2DSD and a doubled clock to I2SoverUSB.
The VCXOs and clock buffer are powered by clean 3.3V from an ADM7150 with a 10uF MLCC output capacitor and a Pi-filter that is optimised for frequencies from 22.5792 up to the fifth harmonic of 24.576 MHz. Using Murata's SimSurfing tool this filtering is calculated to reach 130 to 150 dB within those frequencies.
The clock doubler at the input takes auxiliary power from the 3.3V provided by the PCM2DSD. This will be much noisier than the clean 3,3V but also ensures that the VCXOs and clock buffer operate in a quiet environment free from the clock doubler PLL. Given the later reclocking, I thought it would not warrant a separate power supply either.
Ad 2: Three separate flip-flops, positive-edge triggered with dual gates. I chose this approach over multibit components, so that the three lines interfere with each other less. Perhaps at the expensive of some part-to-part skew, which is not specified in the datasheets. TI parts seem to have lower propagation delay than ON.
A single master clock line is connected to all six clock inputs. As the traces split 1:6 this may cause the impedance to deviate from 50Ω. However I thought this would be better than introducing yet another clock buffer, which would also introduce channel-to-channel skew. Better to optimise the traces during PCB design.
From the datasheets I estimated the output impedance require a 13Ω series resistor, which I also put in between Q1 and Q2 of each flip-flop. Probably overkill on such short traces?
The flip-flops are powered by the same clean 3.3V as the clock section, however with branching off the same ADM7150 with its own Pi-filter. One leg of this filter has a 10uF tantalum instead of MLCC because the LVDS driver likes to have one (see below). This filter extends down to 5.6448 MHz for the DSDL and DSDR lines.
Ad 3: DPDT switch. In its normal state it passes the DSD_IN flag to PCM2DSD (inverting DSD_PCM_inv from I2SoverUSB to resemble Amanero) and passes the DSDOUT flag from PCM2DSD to the output section. I know PCM2DSD currently always sets DSDOUT to HIGH but who knows what future versions will do.
In bypass state it passes HIGH to DSD_IN which forces PCM2DSD to let the I2S data through unchanged (thanks for the idea @Markw4) and passes the inverted DSD_PCM_inv to the output section. This state allows PCM audio to pass through.
Ad 4: Most things have been said already. Note that unlike DSD_PCM_inv, MUTE_inv does not need to be inverted. The logic is the same for I2SoverUSB and Amanero. The mute signal is pulled HIGH by R5 to ensure it is enabled during startup.
Ad 5: TI DS90LV031ATM LVDS driver for four channels. I investigated using four single-channel parts to separate the lines like with the flip-flops. IanCanada's HdmiPi Pro also does this. However, these parts have significant part-to-part skew, much larger than the channel-to-channel skew, so that seems more detrimental than beneficial.
The differential signals are connected to a HDMI A connector using the SMSL pinout. This pinout seems to get it all right: it does not swap polarity of the data line, does not connect +5V/GND for hot-plug detection (causing all sorts of power supply issues), and does connect both DSD_ON and MUTE flags in way that many DACs can accept.
The MUTE signal is taken from the PCM2DSD output. I know that this is currently simply a point-to-point connection to the I2SoverUSB. But like with the DSDOUT signal, who knows what future versions will do.
The DS90LV031ATM datasheet is quite specific about using three decades of bypass capacitors and a tantalum bulk capacitor. Although those bypass capacitors might be more for frequencies that true HDMI can use and not I2S HDMI, I kept them anyway. First, who knows what we pick up through the HDMI cable from the DAC. Second, SimSurfing simulation does not show harmful self-resonances.
The tantalum capacitor is put in one leg of the Pi-filter. I considered using another ADM7150 but it seems unnecessary: the power requirements are slim and the Pi-filter should keep the voltage rail clean. At 130 - 150 dB at the frequencies of interest maybe even cleaner than the PSRR of another LDO (?)
Well, that's it for now. Thanks for making it to the end. Again, all comments and suggestions welcome - this is new territory for me!
- Low jitter master clock generation & buffered fan-out
- Reclocking after the PCM2DSD FPGA
- PCM bypass switch
- I2SoverUSB v.III input
- I2S HDMI output
This is the most complex design I have done so far. I kindly invite your comments and suggestions.
Design notes, numbering corresponding to the goals above:
Ad 1: Dual Crystek CCHD-957s, one of which is enabled by I2SoverUSB. R10 is a pull-up resistor to ensure that only one is running during startup, when the A0_inv signal might float. The default is the 44.1 kHz family, which is what I listen to 99.9% of the time. For that reason I also chose not to leave both running and switching between their outputs. Having only one running also prevents noise going from one to the other through the voltage rail.
A TI LMK1C1103PWR buffer provides three clock copies for each section: input, reclocking and output. It seems like a nice and relatively new (?) part with lower jitter than the popular ON NB3L553. At the input section, an ON NB3N502 sends a copy of the clock reference to PCM2DSD and a doubled clock to I2SoverUSB.
The VCXOs and clock buffer are powered by clean 3.3V from an ADM7150 with a 10uF MLCC output capacitor and a Pi-filter that is optimised for frequencies from 22.5792 up to the fifth harmonic of 24.576 MHz. Using Murata's SimSurfing tool this filtering is calculated to reach 130 to 150 dB within those frequencies.
The clock doubler at the input takes auxiliary power from the 3.3V provided by the PCM2DSD. This will be much noisier than the clean 3,3V but also ensures that the VCXOs and clock buffer operate in a quiet environment free from the clock doubler PLL. Given the later reclocking, I thought it would not warrant a separate power supply either.
Ad 2: Three separate flip-flops, positive-edge triggered with dual gates. I chose this approach over multibit components, so that the three lines interfere with each other less. Perhaps at the expensive of some part-to-part skew, which is not specified in the datasheets. TI parts seem to have lower propagation delay than ON.
A single master clock line is connected to all six clock inputs. As the traces split 1:6 this may cause the impedance to deviate from 50Ω. However I thought this would be better than introducing yet another clock buffer, which would also introduce channel-to-channel skew. Better to optimise the traces during PCB design.
From the datasheets I estimated the output impedance require a 13Ω series resistor, which I also put in between Q1 and Q2 of each flip-flop. Probably overkill on such short traces?
The flip-flops are powered by the same clean 3.3V as the clock section, however with branching off the same ADM7150 with its own Pi-filter. One leg of this filter has a 10uF tantalum instead of MLCC because the LVDS driver likes to have one (see below). This filter extends down to 5.6448 MHz for the DSDL and DSDR lines.
Ad 3: DPDT switch. In its normal state it passes the DSD_IN flag to PCM2DSD (inverting DSD_PCM_inv from I2SoverUSB to resemble Amanero) and passes the DSDOUT flag from PCM2DSD to the output section. I know PCM2DSD currently always sets DSDOUT to HIGH but who knows what future versions will do.
In bypass state it passes HIGH to DSD_IN which forces PCM2DSD to let the I2S data through unchanged (thanks for the idea @Markw4) and passes the inverted DSD_PCM_inv to the output section. This state allows PCM audio to pass through.
Ad 4: Most things have been said already. Note that unlike DSD_PCM_inv, MUTE_inv does not need to be inverted. The logic is the same for I2SoverUSB and Amanero. The mute signal is pulled HIGH by R5 to ensure it is enabled during startup.
Ad 5: TI DS90LV031ATM LVDS driver for four channels. I investigated using four single-channel parts to separate the lines like with the flip-flops. IanCanada's HdmiPi Pro also does this. However, these parts have significant part-to-part skew, much larger than the channel-to-channel skew, so that seems more detrimental than beneficial.
The differential signals are connected to a HDMI A connector using the SMSL pinout. This pinout seems to get it all right: it does not swap polarity of the data line, does not connect +5V/GND for hot-plug detection (causing all sorts of power supply issues), and does connect both DSD_ON and MUTE flags in way that many DACs can accept.
The MUTE signal is taken from the PCM2DSD output. I know that this is currently simply a point-to-point connection to the I2SoverUSB. But like with the DSDOUT signal, who knows what future versions will do.
The DS90LV031ATM datasheet is quite specific about using three decades of bypass capacitors and a tantalum bulk capacitor. Although those bypass capacitors might be more for frequencies that true HDMI can use and not I2S HDMI, I kept them anyway. First, who knows what we pick up through the HDMI cable from the DAC. Second, SimSurfing simulation does not show harmful self-resonances.
The tantalum capacitor is put in one leg of the Pi-filter. I considered using another ADM7150 but it seems unnecessary: the power requirements are slim and the Pi-filter should keep the voltage rail clean. At 130 - 150 dB at the frequencies of interest maybe even cleaner than the PSRR of another LDO (?)
Well, that's it for now. Thanks for making it to the end. Again, all comments and suggestions welcome - this is new territory for me!
Well, to my way of thinking it could probably be improved in some ways...
Before getting into specifics though, could we see an overall system block diagram including power supplies, interconnects, power line grounding, etc. A 'whole system' top down drawing. With that we can better understand how the specific board design fits into the big picture.
Thanks!
Here you go. Is this what you are looking for?
This “gizmo”, like other well designed consumer audio equipment, should work well regardless of earthing / not earthing / filtering / not filtering. Of course, barring poorly designed hardware or toxic ground loops that any other equipment would also suffer from.
The gizmo will inside its chassis have its own power supply to go from 230VAC mains to 5VDC. I am going back and forth between something like an AMB σ11 linear shunt PSU on one extreme and a Meanwell IRM-05 SMPS on the other. Obviously the SMPS has much greater noise and ripple, but it’s dead easy to integrate, and can be used to great effect as for example the Singxer shows (121 dB SINAD at the output!)
This “gizmo”, like other well designed consumer audio equipment, should work well regardless of earthing / not earthing / filtering / not filtering. Of course, barring poorly designed hardware or toxic ground loops that any other equipment would also suffer from.
The gizmo will inside its chassis have its own power supply to go from 230VAC mains to 5VDC. I am going back and forth between something like an AMB σ11 linear shunt PSU on one extreme and a Meanwell IRM-05 SMPS on the other. Obviously the SMPS has much greater noise and ripple, but it’s dead easy to integrate, and can be used to great effect as for example the Singxer shows (121 dB SINAD at the output!)
Yes, thank you. Looks like there is a big ground loop between where the streamer gets AC power and the dac gets AC power. Another likely one or more between the dac analog outputs and the downstream equipment. Big, high quality common mode chokes can help substantially in many cases. However, the ones in many power entry modules may be a trade off between helping and hurting, due to ferrite hysteresis effects.
First caveat that seems worth pointing would be that LVDS is not as low jitter as would be optimal for a dac. Not only that but for commercial dacs that support the PS Audio I2S over HDMI connector standard, there is often a CPLD between the LVDS receiver and the the dac. One might think of it as a jitter restoration system. Therefore not clear how much this effort may help sound stage illusion, localization, and other factors related to low phase noise. That said, some people have tried this type of thing before and believe that it helped at least some.
Therefore, it might be wise to include a separately buffered/reclocking LVCMOS I2S output with a dedicated ground pin for each signal pin. In cases where a dac may be interfaced using LVCMOS instead of LVDS that would be preferable for lowest jitter.
Regarding LMK1C110x, datasheet phase noise plots only extend down to 1kHz, and rated phase noise appears to be taken at 12kHz. IMHO this part is not shown to be suitable for digital audio use. It appears to be spec'ed for other types of communication systems use. Instead NB3L553 would probably be a better choice here. It has already found successful use in a number of high quality dacs.
Regarding the use of ferrite beads on clock power, I would not do it. Tried it once an it collapsed the sound stage. However, if you want to leave a pad for it you can put a zero ohm resistor there and if you have problems you could try a ferrite bead. Might change the sound in various ways, not all of them bad. A collapsed sound stage is IMHO bad though.
Some important things to know about Crystek clocks. Forum member @diyiggy found that using the following bypass caps resulted in best sound: 16MU224MZ22012 They are not cheap, but IME necessary to get decent sound with Crystek. They also keep sound good if used on NB3L553 buffers. Both clocks should be kept enabled and running at all times. Switch clock outputs with a small signal relay having gold contacts. Omron makes some good ones, including one shielded for RF (although that one is not usually necessary for out use here).
Also, clocks and clock buffers should be on local dedicated 3.3v regulators on the same ground plane as the clocks and buffers. Local surface fill areas which can be used to return bypass currents may provide better results than routing bypass currents through vias to the ground plane layer. Trying to keep bypass currents on local surface fills may help keep the ground plane clean at the frequencies will be working with here. If it were GHz stuff and or non-mixed signal, then I might say something different. Why is it mixed signal here? Because clocks have internal analog oscillators. There is a thread at: https://www.diyaudio.com/community/...pacitor-simulation-model.382329/#post-6943549 where some of these things have been discussed in more detail.
Regarding ADM715x regulators, IME they don't sound great but can sound better in some cases if a load resistor is connected from the output to ground. The idea it to run them at some optimum current for best performance. May or may not help with analog circuitry such as clock oscillators. Have to try it and see.
Okay, that's enough for one writing session.
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Regarding the ground loop: I thought you might say that, which is why I made the point that good electronic devices are designed to deal with that.
I don’t suffer from ground loop issues today as I stream to my DAC without the gizmo. Digital and audio grounds should not be bonded to mains earth, and the gizmo won’t do that either. Plus the USB is isolated.
At the bottom right of the schematic you do see the HDMI cable shield being tied to earth, which is how it should be done like with XLR cables: https://www.hypex.nl/media/fa/d8/a3/1682342122/The G word.pdf
Thanks for the extensive write-up you just posted on the schematic. Just took a quick look and have to bike home now. Will surely dive into it later!
I don’t suffer from ground loop issues today as I stream to my DAC without the gizmo. Digital and audio grounds should not be bonded to mains earth, and the gizmo won’t do that either. Plus the USB is isolated.
At the bottom right of the schematic you do see the HDMI cable shield being tied to earth, which is how it should be done like with XLR cables: https://www.hypex.nl/media/fa/d8/a3/1682342122/The G word.pdf
Thanks for the extensive write-up you just posted on the schematic. Just took a quick look and have to bike home now. Will surely dive into it later!