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Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 KHz

I connect AES SPDIF to two dam dacs in parallel running balance mode. I use SPDIF1+ and SPDIF1- and GND as connection. It can lock the signal in normal case, however, when I switch on/off the lights in home such as the lamp in toilet or kitchen, it will loss signal and muted for 1/2 second until it can relock again.
Does anyone know what would be the cause and how to solve it? Thanks.

This is maybe an AC bounce due to different potentials in different hifi boxes. (probably Computer and DAC). Try to connect all the grounds together (bridge the isolation), so that all boxes (and sections) run on the same reference potential. See if the problem still exists then.
 
This is maybe an AC bounce due to different potentials in different hifi boxes. (probably Computer and DAC). Try to connect all the grounds together (bridge the isolation), so that all boxes (and sections) run on the same reference potential. See if the problem still exists then.
Thanks for your reply.

The DAC is connected with CD player thru SPDIF (AES) connection. How can I make sure the grounds are connected?
 
I connect AES SPDIF to two dam dacs in parallel running balance mode. I use SPDIF1+ and SPDIF1- and GND as connection. It can lock the signal in normal case, however, when I switch on/off the lights in home such as the lamp in toilet or kitchen, it will loss signal and muted for 1/2 second until it can relock again.
Does anyone know what would be the cause and how to solve it? Thanks.

I guess you are trying to run SPDIF over balanced XLR connection, not actual AES/EBU signaling? AES3 uses higher voltages than SPDIF and could potentially damage the FPGA chip unless you use an appropriate transformer or other level matching circuit.

Do you use an isolation transformer on SPDIF input?
Have you biased the SPDIF inputs with 1.2V DC?
Does the problem happen with only one dac connected?
 
I guess you are trying to run SPDIF over balanced XLR connection, not actual AES/EBU signaling? AES3 uses higher voltages than SPDIF and could potentially damage the FPGA chip unless you use an appropriate transformer or other level matching circuit.
Yes, it is just SPDIF over balance XLR connection.

Do you use an isolation transformer on SPDIF input?
No I don't, just connect the + of XLR to SPDIF1+, - of XLR to SPDIF1-, GND of XLR to GND of dam, parallel three wires to two dam cards (for bal-left and bal-right)

Have you biased the SPDIF inputs with 1.2V DC?
No

Does the problem happen with only one dac connected?
Never tried, as my friend only get one source (CDP) one digital output(SPDIF over XLR). I tried the Amanero at my home and there was no problem.
 
Yes, it is just SPDIF over balance XLR connection.

No I don't, just connect the + of XLR to SPDIF1+, - of XLR to SPDIF1-, GND of XLR to GND of dam, parallel three wires to two dam cards (for bal-left and bal-right)

No

Never tried, as my friend only get one source (CDP) one digital output(SPDIF over XLR). I tried the Amanero at my home and there was no problem.

Shouldn't really work at all, trafo is needed and spdif- need to be biased. You also need to limit maximum voltage input as real AES can overload the input, use a voltage divider.
 
I have a new issue on 1.04 firmware. My DAC won't automatically switch sources between SPDIF and USB(I2S) as it was on 0.99. When both SPDIF and USB signals are available and DAC is playing from USB, when I disconnect USB cable it won’t switch to SPDIF. Power cycle is required. Then it’s playing from SPDIF. I’m connecting USB cable, start playing something by USB, then turn off SPDIF source and again – it won’t switch to USB without power cycle. I don't have source selector connected, only auto mode.

Could somebody confirm this?

Yes, found the bug, version 1.05 will be out soon.
 
Hi Søren quick question, what it is purpose of the 10R resistors on the LME49724 output? If I am using the buffers solely for headphones are they really required?

Cheers.

From the datasheet; though it shouldn't apply to my application?

"Although the LME49724 can drive capacitive loads up to 100pF, cable loads exceeding 100pF can cause
instability. For such applications, series resistors are needed on the outputs before the capacitive load."
 
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Hi Søren quick question, what it is purpose of the 10R resistors on the LME49724 output? If I am using the buffers solely for headphones are they really required?

Cheers.

From the datasheet; though it shouldn't apply to my application?

"Although the LME49724 can drive capacitive loads up to 100pF, cable loads exceeding 100pF can cause
instability. For such applications, series resistors are needed on the outputs before the capacitive load."

Don't your headphones have a cable ? Cables are capacitive loads....