Andrew,
the actual schematics of one module can be found on my web page. There are 2 x 2 identical modules connected as a bridge. The balanced operation has been achieved by high quality input line transformers (hello Susan ;-)). Soon I am going to try a DRV134 based preamplifier. Output power is >2 x 50W/8 Ohm and 2 x 100W/4 Ohm (bridge mode).
I have finally decided not to modify the design for the IRF's, as I am not satisfied with simulation results for these transistors.
PF2005,
Pavel
the actual schematics of one module can be found on my web page. There are 2 x 2 identical modules connected as a bridge. The balanced operation has been achieved by high quality input line transformers (hello Susan ;-)). Soon I am going to try a DRV134 based preamplifier. Output power is >2 x 50W/8 Ohm and 2 x 100W/4 Ohm (bridge mode).
I have finally decided not to modify the design for the IRF's, as I am not satisfied with simulation results for these transistors.
PF2005,
Pavel
Hi, PMA,
After studying your clever CCT, I have some questions (I cannot answer myself due to limited equipment)
1. Does your NP-PMA increase slew rate and damping factor if the whole amp is used non-global feedback (excluding the output stage in the feedback loop)?
2. I try to trace the VBE of Q1.Q2.Q3.Q4. It seems in dynamic condition (like playing music) each VBE will not quite the same value while in your original CCT, those are clamped rigidly. Will putting base resistors to Q1-4 like 1kohm will improve/worsen the performance?
3. To make it adjustable bias drop, can 10k replaced by R+VR (like 5k VR + 5k R)?
After studying your clever CCT, I have some questions (I cannot answer myself due to limited equipment)
1. Does your NP-PMA increase slew rate and damping factor if the whole amp is used non-global feedback (excluding the output stage in the feedback loop)?
2. I try to trace the VBE of Q1.Q2.Q3.Q4. It seems in dynamic condition (like playing music) each VBE will not quite the same value while in your original CCT, those are clamped rigidly. Will putting base resistors to Q1-4 like 1kohm will improve/worsen the performance?
3. To make it adjustable bias drop, can 10k replaced by R+VR (like 5k VR + 5k R)?
Cortez said:Where is a description about the main thory about this "error correction" technique ?
/Sorry if i'm blind, but i dont saw it in this topic.../
The originator is Malcolm Hawksford. His paper collection will be found when you google "the essex echo".
Jan Didden
Edit: 3rd & 4th paper down:
http://www.essex.ac.uk/ese/research/audio_lab/malcolms_publications.html
error correction circuit understanding
Hi everybody,
I'm new here and this is my first post.
My question is : is anybody (PMA ?) could explain just with hands how this correction sheme works ?
I have read all the "Hawksford" topic and all the JEAS papers from M.J. Hawksford concerning "distortion correction in audio Power Amplifiers". All the topologies described in these papers differs from this error correction circuit and I'm still unable to understand it.
For me, this circuit seems to change the DC voltage difference between the gates of N-MOS and P-MOS respectively if the error voltage between output node and D1.D2 node drops. Is it correct ?
Hi everybody,
I'm new here and this is my first post.
My question is : is anybody (PMA ?) could explain just with hands how this correction sheme works ?
I have read all the "Hawksford" topic and all the JEAS papers from M.J. Hawksford concerning "distortion correction in audio Power Amplifiers". All the topologies described in these papers differs from this error correction circuit and I'm still unable to understand it.
For me, this circuit seems to change the DC voltage difference between the gates of N-MOS and P-MOS respectively if the error voltage between output node and D1.D2 node drops. Is it correct ?
Christophe,
Here it is very simply put.
A diff pair lies at the heart, with input drive to the left side emitters via diodes, and output error sense to the right side via diodes. The mosfet gates are driven from the top and bottom of the diff pair 'trees'. The right side has a resistor in its collector circuits, top and bottom, while the left side has no collector resistor.
Consider a positive going signal; we will look only at the top 'half' of the circuit. The bottom half is complementary, so the operation is identical.
If the output potential drops below the input because of gain droop in the output device, then the right side transistor of the diff pair turns on harder because the emitter potentials are no longer the same. Rather than sharing the current equally, the two diff pair transistors are now unbalanced, with more current passing through the collector of the right device.
This increased current drops more voltage in the right side (upper) collector resistor, which connects to the mosfet gate. The adjacent transistor on the left side passes less current, but this current does not pass through a collector resistor, so there is no voltage effect and it readily accommodates this increased potential since collector voltage is always flexible.
We now have more voltage dropped across the upper of the two resistors on the right side. The voltages across all other resistors are essentially constant as they are fixed by base bias currents, so now, addressing the entire circuit block, we have more voltage dropped from the mid-point error correction node on the right side to the top of the collector resistor on the right side - which of course is connected to the mosfet gate.
This means that voltage between input and upper mosfet gate has increased. Thus there is more voltage drive to the upper mosfet measured from left side input to upper mosfet gate, which immediately compensates the gain droop, and again raises the output potential to the input potential. At this point the diff pair currents again become equal, and the voltage drop across the upper (collector) resistor drops, and the cycle starts over, with continuous adjustment to ensure the output tracks the input.
Of course, the complementary operation takes place when the negative half cycle conducts, with explanation identical.
Top and bottom of the error correction circuitry is fed by constant current sources. Any spillover current finds its way harmlessly into the output via the error node, ensuring that minor differences in source and sink current do not halt proceedings.
The circuit is clever and extremely fast because small signal devices around 150MHz are used and there are only parasitic capacitances. However, it requires appreciable operating voltage bias from gate to source of the output device - no problem on a hexfet, but rather tight on a double emitter follower. I've not built and tested it, but it is likely the operation is compromised to some extent with only 1.2V to 'fit' it in compared to a hexfet's 3.2V or so.
Cheers,
Hugh
Here it is very simply put.
A diff pair lies at the heart, with input drive to the left side emitters via diodes, and output error sense to the right side via diodes. The mosfet gates are driven from the top and bottom of the diff pair 'trees'. The right side has a resistor in its collector circuits, top and bottom, while the left side has no collector resistor.
Consider a positive going signal; we will look only at the top 'half' of the circuit. The bottom half is complementary, so the operation is identical.
If the output potential drops below the input because of gain droop in the output device, then the right side transistor of the diff pair turns on harder because the emitter potentials are no longer the same. Rather than sharing the current equally, the two diff pair transistors are now unbalanced, with more current passing through the collector of the right device.
This increased current drops more voltage in the right side (upper) collector resistor, which connects to the mosfet gate. The adjacent transistor on the left side passes less current, but this current does not pass through a collector resistor, so there is no voltage effect and it readily accommodates this increased potential since collector voltage is always flexible.
We now have more voltage dropped across the upper of the two resistors on the right side. The voltages across all other resistors are essentially constant as they are fixed by base bias currents, so now, addressing the entire circuit block, we have more voltage dropped from the mid-point error correction node on the right side to the top of the collector resistor on the right side - which of course is connected to the mosfet gate.
This means that voltage between input and upper mosfet gate has increased. Thus there is more voltage drive to the upper mosfet measured from left side input to upper mosfet gate, which immediately compensates the gain droop, and again raises the output potential to the input potential. At this point the diff pair currents again become equal, and the voltage drop across the upper (collector) resistor drops, and the cycle starts over, with continuous adjustment to ensure the output tracks the input.
Of course, the complementary operation takes place when the negative half cycle conducts, with explanation identical.
Top and bottom of the error correction circuitry is fed by constant current sources. Any spillover current finds its way harmlessly into the output via the error node, ensuring that minor differences in source and sink current do not halt proceedings.
The circuit is clever and extremely fast because small signal devices around 150MHz are used and there are only parasitic capacitances. However, it requires appreciable operating voltage bias from gate to source of the output device - no problem on a hexfet, but rather tight on a double emitter follower. I've not built and tested it, but it is likely the operation is compromised to some extent with only 1.2V to 'fit' it in compared to a hexfet's 3.2V or so.
Cheers,
Hugh
Assume the ccs is 20mA. At no signal the current will be half (10mA) to left transistor, and 10mA to right transistor, equally.
But in excited condition, like there is positive signal, to the left say, only 5mA, and to the right will be 15mA.
If the transistor have the same VBE for passing 5mA and 15mA, there will be no problem. But if the VBE needs different value, in this cct, left and right transistor's VBE are the same value?
But in excited condition, like there is positive signal, to the left say, only 5mA, and to the right will be 15mA.
If the transistor have the same VBE for passing 5mA and 15mA, there will be no problem. But if the VBE needs different value, in this cct, left and right transistor's VBE are the same value?
Hi, Mr. Dean,
This is David (lumanauw)
Are the 4 diodes can be removed to use this cct for bipolars output stage? I dont know what is the main purpose of the 4 diodes in the original NP-PMA, but if it is used to elevate VBE drop (due to mosfet device used, to make the VBE multiplier see 2xVBE as the basic value), I think the cct should work fine if those 4 diodes are removed for using bipolar/darlington bipolar (having lower VBE than VGS) output stages.
This is David (lumanauw)
Are the 4 diodes can be removed to use this cct for bipolars output stage? I dont know what is the main purpose of the 4 diodes in the original NP-PMA, but if it is used to elevate VBE drop (due to mosfet device used, to make the VBE multiplier see 2xVBE as the basic value), I think the cct should work fine if those 4 diodes are removed for using bipolar/darlington bipolar (having lower VBE than VGS) output stages.
>Hugh,
Many thanks for your complete and very clear explanation. I just used my french/english dictionnary for few words , but it's OK. Everything is understood.
> Lumanauw
I'm not specialist on audio circuits (I'm playing with microwave circuits in my job) but what do you think about replacing power MOSFETs by IGBTs (I really don't know if it is a good idea). They can be driven like FET are and have bipolar outputs characteristics.
Many thanks for your complete and very clear explanation. I just used my french/english dictionnary for few words
, but it's OK. Everything is understood.> Lumanauw
I'm not specialist on audio circuits (I'm playing with microwave circuits in my job) but what do you think about replacing power MOSFETs by IGBTs (I really don't know if it is a good idea). They can be driven like FET are and have bipolar outputs characteristics.
Christophe,
My pleasure; I'm flattered that you understood my English explanation. Actually, it is not an easy circuit to understand.
David (Lumenauw),
I suspect the diodes are a tempco addition, to ensure the operating points do not much change with voltage. In a bipolar output stage, they could be omitted, but I suspect temperature effects could be tricky; certainly you would need to bunch all the diff pairs together so that they share the same Vbe changes.
IGBTs should work fine, I'd say, but I believe mosfets or bipolars would be faster. It's no problem to buy 30MHz bipolar outputs these days, and unless the IGBTs are of a similar speed, I can't see any advantage.
Hats off to Pavel Macura for this clever design. I wish I had thought of it!
Cheers,
Hugh
My pleasure; I'm flattered that you understood my English explanation. Actually, it is not an easy circuit to understand.
David (Lumenauw),
I suspect the diodes are a tempco addition, to ensure the operating points do not much change with voltage. In a bipolar output stage, they could be omitted, but I suspect temperature effects could be tricky; certainly you would need to bunch all the diff pairs together so that they share the same Vbe changes.
IGBTs should work fine, I'd say, but I believe mosfets or bipolars would be faster. It's no problem to buy 30MHz bipolar outputs these days, and unless the IGBTs are of a similar speed, I can't see any advantage.
Hats off to Pavel Macura for this clever design. I wish I had thought of it!
Cheers,
Hugh
The mosfets currents are here http://web.telecom.cz/macura/error_currents.gif
Does the mosfets still turning off or never turning off (like Blomley)? From the .gif, it seems still turning off.
Does the mosfets still turning off or never turning off (like Blomley)? From the .gif, it seems still turning off.
Hi Thorsten,
Normally when we drive the emitters of a bipolar transistor, the Zin is given approximately by 26/Ic ohms, where Ic is the collector current. This would certainly point to a low input impedance, but there is more to it than this.
The collector of all transistors is coupled either directly or indirectly (depending on which devices we are looking at, input side or output side) to current sources/sinks. These have impedances in the megohms, very high, so they probably don't enter in the impedance considerations too much.
However, the mosfet gates are highly capacitive, and they do have an input impedance, particularly at the top of the audio band. But the devices are in source follower mode, so effectively the capacitive input reactance to source is bootstrapped by the local negative feedback of this configuration. The only parasitic we should therefore consider is the gate to drain capacitance, which is not shielded from the input as the voltage swing is very real, and is the equivalent of Miller capacitance in a bipolar.
So, the low input impedance of the emitters is buffered by the very high series impedance of the CCS top and bottom; and the true input impedance will reflect the Cgd of the mosfets operating in source follower. This will be rather high, typically 500pF, so represents the effective input impedance of this circuit, which can certainly be driven by a highish impedance source in the normal way.
Pavel might have a different explanation; beware just one man's opinion - I might be wrong!
Cheers,
Hugh
Normally when we drive the emitters of a bipolar transistor, the Zin is given approximately by 26/Ic ohms, where Ic is the collector current. This would certainly point to a low input impedance, but there is more to it than this.
The collector of all transistors is coupled either directly or indirectly (depending on which devices we are looking at, input side or output side) to current sources/sinks. These have impedances in the megohms, very high, so they probably don't enter in the impedance considerations too much.
However, the mosfet gates are highly capacitive, and they do have an input impedance, particularly at the top of the audio band. But the devices are in source follower mode, so effectively the capacitive input reactance to source is bootstrapped by the local negative feedback of this configuration. The only parasitic we should therefore consider is the gate to drain capacitance, which is not shielded from the input as the voltage swing is very real, and is the equivalent of Miller capacitance in a bipolar.
So, the low input impedance of the emitters is buffered by the very high series impedance of the CCS top and bottom; and the true input impedance will reflect the Cgd of the mosfets operating in source follower. This will be rather high, typically 500pF, so represents the effective input impedance of this circuit, which can certainly be driven by a highish impedance source in the normal way.
Pavel might have a different explanation; beware just one man's opinion - I might be wrong!
Cheers,
Hugh
Hi Aksa !
Thank You for Your interesting explanation. I came to the same conclusion by another train of thought a few hours after I posted the question. What I had in mind was to take only the upper half of the outputstage an drive it direct from the collector/drain of an inputtransistor which was fed by current from the left hand transistor. I see now that this is not a good idea, exept maybe if lots of overall feedback is applied.
As far as I can se now the curcuit does´nt work much different than a normal diferential stage driving a mosfet whith 100 % feedback.
Cheers!
Thorsten
Thank You for Your interesting explanation. I came to the same conclusion by another train of thought a few hours after I posted the question. What I had in mind was to take only the upper half of the outputstage an drive it direct from the collector/drain of an inputtransistor which was fed by current from the left hand transistor. I see now that this is not a good idea, exept maybe if lots of overall feedback is applied.
As far as I can se now the curcuit does´nt work much different than a normal diferential stage driving a mosfet whith 100 % feedback.
Cheers!
Thorsten