Interesting to note...perhaps Scott (world-famous Scott!) was in contact with, or observed by the folks at the Dipartimento di Ingegnaria Electronica at University of Messina who authored an article in "Review of Scientific Instruments" in 2014 describing a very low noise programmable current source using the Vishay gate driver described by Scott!
Scandarra et al, "Programmable, very low noise current source", Review of Scientific Instruments 85, 125109 (2014).
thanks for that article. Unfortunately it is not open acces. Found the link here:
https://pubs.aip.org/aip/rsi/articl...-noise-current-source?redirectedFrom=fulltext
https://pubs.aip.org/aip/rsi/articl...-noise-current-source?redirectedFrom=fulltext
Isn't it possible to use the input JFet without bias voltage and source resistor at Vgs = 0, because the signal voltages are so small ?
Also interesting:
An ultralow noise preamplifier for low frequency noise measurements
Gianluca Cannatà, Graziella Scandurra, and Carmine Cio
doi: 10.1063/1.3258197
I think I heard people mumbling that it was on scihub.
Sh***y search engine, but doi helps.
My IF3602s may find a home after all?
Gerhard
An ultralow noise preamplifier for low frequency noise measurements
Gianluca Cannatà, Graziella Scandurra, and Carmine Cio
doi: 10.1063/1.3258197
I think I heard people mumbling that it was on scihub.
Sh***y search engine, but doi helps.
My IF3602s may find a home after all?
Gerhard
I knew a guy who had his work used without attribution. He sent the publication author a bill for $5k. They guy paid. This was roughly 25 years ago.
It has turned out in the mean time that this amplifier features the neg. real
part of the input impedance, too. (LTspice with the new TI FETs) :-(
Vishay put a model on their website, but it is "double-spaced", requiring some editing to be useable. The part is now "long lead time" but can still be found.
In honour of Scott, who passed away recently, we are publising here the Gerber files of his LNA circuit, both the NJFET and PJFET version.
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-4442622
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-5007920
The XEN logo has been replaced by "In Fond Memories of Scott Wurcer".
As far as I can remember, and it has been quite a few years now, the Gerber files are accurate and bug free.
But I am sure you can easily trace the circuit on the board before soldering.
The BoM will need a few more days, so that I can check availability, etc.
Patrick
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https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-4442622
https://www.diyaudio.com/community/...urement-amp-for-ikoflexer.175044/post-5007920
The XEN logo has been replaced by "In Fond Memories of Scott Wurcer".
As far as I can remember, and it has been quite a few years now, the Gerber files are accurate and bug free.
But I am sure you can easily trace the circuit on the board before soldering.
The BoM will need a few more days, so that I can check availability, etc.
Patrick
.
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Quicker than I thought, as most of the components from 2023 are still valid.
But of course feel free to choose whatever you think will give even better performance.
Patrick
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But of course feel free to choose whatever you think will give even better performance.
Patrick
.
Sorry for ignoring the question.
With FETs, gm is proportional to the root of Id. Noise goes down with the root of gm.
So, maximizing the current pays only with the 4th root. Idss (Vgs=0) is the maximum
current a JFET is probable to see.
Using more FETs in par is more attractive than having only one JFET sweat.
It is possible. But, it's still better to invest in more FETs than in more current.
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Thank you for reply. My main intention was to learn is the high Jfet input resistance lost
with a small positive swing ?. I think it is not (my electronics professor did not agree).
with a small positive swing ?. I think it is not (my electronics professor did not agree).
Semiconductor physics isn't my forte, but I think your position is more correct than the professor's.
There is a an inherent diode junction gate-to-channel, but the applied signal is small. Conduction should be no more than that of a small signal diode near the origin in the I/V plane. Less in fact, since the voltage channel to gate sees increasing reverse bias along the length of the channel until it reaches the drain voltage, some few volts above ground assuming active operating point. Said differently, the gate is at 0V re the channel only at the source end of the channel where source is same potential as gate.
There is a an inherent diode junction gate-to-channel, but the applied signal is small. Conduction should be no more than that of a small signal diode near the origin in the I/V plane. Less in fact, since the voltage channel to gate sees increasing reverse bias along the length of the channel until it reaches the drain voltage, some few volts above ground assuming active operating point. Said differently, the gate is at 0V re the channel only at the source end of the channel where source is same potential as gate.
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Scott's design is very good, and should be considered by everyone who needs a measurement preamp with a gain of 1000, including those who cannot easily source the optocoupler.
Therefore I propose the modification below, as a starting point. Unlike the original, it's not smoothly adjustable (the pot adjustment will be quite sensitive). But it's more general (accepts BJTs and also MOS in place of the JFET, in case one is interested in looking at the noise of those devices).
It is stable in the simulator with BJTs and a compensation cap of 2p (which is also adequate for JFETs). The switches have to be closed when using a BJT. I have not yet built it.
Therefore I propose the modification below, as a starting point. Unlike the original, it's not smoothly adjustable (the pot adjustment will be quite sensitive). But it's more general (accepts BJTs and also MOS in place of the JFET, in case one is interested in looking at the noise of those devices).
It is stable in the simulator with BJTs and a compensation cap of 2p (which is also adequate for JFETs). The switches have to be closed when using a BJT. I have not yet built it.
Just to make it clear to anyone interested: a low noise JFET such as 2SK170 will normally be used in the circuit above, to make it a useful high input impedance measurement preamp.
The possibility of using BJTs and MOS is for the purpose of looking at noise plots of these devices, with the input grounded.
One useful addition to the schematic above is a 10 ohm resistor in series with the collector/drain of the device, which serves as a test point to measure bias current.
The possibility of using BJTs and MOS is for the purpose of looking at noise plots of these devices, with the input grounded.
One useful addition to the schematic above is a 10 ohm resistor in series with the collector/drain of the device, which serves as a test point to measure bias current.