Yes 🙂, it is near of a truth. I am also thinking about this. Properly level of unfiltered full wave detector signal, when injected in JFET gate, may help to reduce 3rd.
Victor
The time constant of the LDR provides a bit of filtering, and (if I did look at it correctly in the few seconds) the filter topology has an elliptic response, which will notch out the dominant harmonic (probably the 3rd).
Samuel
You do realise you're commenting on the very first post of this thread ?
'Mr Ohm 1970' just quoted it without comment.
'Mr Ohm 1970' just quoted it without comment.
You're right (as usual 🙂) - with the 3rd notched out by the output buffer, adding a simmetry trim to the detector can help to reduce quite a bit the 2nd (which is probably mostly due to ripple injection). This way you can get very fast settling and reasonably low THD (but poor flatness and long term stability). All in all, it's a very simple and clever topology.
L.
The Roger Rosens phase shifting Oscillator is clever but I am unsure how accurate the potentiometer matching needs to be for the distortion cancellation to help. The original Wireless World article states that the distortion was measured using 1 % tolerance resistors.
Another variation on the Wien bridge is described at Injection-lock a Wien-bridge oscillator | EDN
Another variation on the Wien bridge is described at Injection-lock a Wien-bridge oscillator | EDN
Interesting he quotes basicly amplifier limited THD (<120dB) with an ordinary one amplifier circuit and Christmas tree lamp.
I have never been able to observe this but I will try. I wonder if the color matters 🙂
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CMRR at 110dB and a pole at 3kHz looks good indeed. Likewise, PSRR also looks to be significantly better than on a, say AD797.
Note that common-mode distortion is not necessarily well correlated to high CMRR. Common-mode distortion is a function of common-mode voltage-dependence of CMRR and common-mode input impedance. If CMRR and common-mode input impedance stay very constant over the relevant common-mode swing, absolute CMRR does not need to be high.
Samuel
Samuel
Even more surprising IIRC LT uses JFET's with back gate to substrate capacitance. The input impedances are out of phase at the harmonics so this component is not cancelled.
It is the 1468-2 uncompensated version used.
I haven't been too successful using this one.
It have to be operated at gains above 2 to be stable and even then....
Yeah, the LME49710 is 0.00003% THD (at unity gain...).
The only difficulty with using the LME49990 is the number of bypass capacitors required at the power supply pins. The datasheet says 3 capacitors per pin are required for stability. As I see it, the only way to fit everything in there is to use the back side of the board as well as the front (top). This can get really fiddly for DIY.
Dirk,
Putting bypass caps on the opposite side of where the part lies is not recommended for good high freq decoupling. Vias create problems as they have inductance, something that you do not want for good de-coupling. Maybe the larger bulk decoupler (1uF) may go on the opposite side, but the smaller ones should be on the same side as the IC. The layout rules usually goes to put the smaller cap closest to the pin followed by the larger ones. Say 1nF,100nF,1uF. Using TH caps is not recommended as they take up a lot more space than a SM caps do, leading to more trace inductance. Choose X7R dielectric for the big ones and COG for the smaller ones, is usually recommended.The trace is to flow through the caps hi side, then finally to the IC pad/lead, with minimal trace length, in other words, no stubs. 0805/0603 are great for this. I agree, not that easy for a bread board design or discrete wiring prototype.
Rick
Putting bypass caps on the opposite side of where the part lies is not recommended for good high freq decoupling. Vias create problems as they have inductance, something that you do not want for good de-coupling. Maybe the larger bulk decoupler (1uF) may go on the opposite side, but the smaller ones should be on the same side as the IC. The layout rules usually goes to put the smaller cap closest to the pin followed by the larger ones. Say 1nF,100nF,1uF. Using TH caps is not recommended as they take up a lot more space than a SM caps do, leading to more trace inductance. Choose X7R dielectric for the big ones and COG for the smaller ones, is usually recommended.The trace is to flow through the caps hi side, then finally to the IC pad/lead, with minimal trace length, in other words, no stubs. 0805/0603 are great for this. I agree, not that easy for a bread board design or discrete wiring prototype.
Rick