LM3886 in parallel with servo circuit build attempt

I sketched some below. I don't know how to calculate those values. Used website here - https://www.embedded.com/analyzing-circuit-sensitivity-for-analog-circuit-design/
I would choose a Butterworth filter response as that's maximally flat. No need to introduce peaking in the DC servo. All the design equations are in Jim Karki's application note, which I linked to in Post #42. Note the equations can be simplified quite a bit if you impose a few constraints on the variables. See Appendix A (in particular section A.2.2). A Butterworth filter has a Q of 0.7 (1/sqrt(2) to be exact).

As for the gain: Do you absolutely need the amp to go to clipping at the reference level? Can the sources not provide more than -10 dBu and +4 dBu, respectively?

Tom
 
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@gooduser: Note that -10dBV and +4dBu are supposed to be nominal levels, not maximum.

Since it's pretty uncommon for full-scale to be less than 1V RMS, I'd just set the gain to around 20V/V. A lot of consumer gear will actually do at least 2V RMS, and some pro gear is capable of more than 10V RMS (balanced).
 
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Preview of the PCB sketch
Comes to 130mm x 60mm
 

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You'll have more fun assembling the board if you rotate the part designators so they're all facing the same way (or at least stick to two rotations - horizontal and vertical). Unless it compromises performance, I prefer to have all polarized parts oriented the same way. So all electrolytic caps have their anodes towards one edge of the board, for example. It makes assembly and debugging easier. I recommend using a square (or rectangular) pad on pin 1 of ICs. It makes finding pin 1 easier during debugging. The part often obscures the silk screen legend...

Spade connections are not commonly used for audio input. You're not likely to find a 1/4" spade that'll attach nicely to a microphone cable. How about a terminal block?

You may get a smidge better performance if you overlay V+ and V- along the top edge of the board on its way to U4. This maximizes the coupling capacitance between the two traces and minimizes the loop area between the traces. That should minimize the coupling into the feedback network around U3. The currents in V+ and V- for a Class AB amp are pretty nasty...

Tom
 
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If you're looking for feedback on the layout it would be helpful if you'd post a screen shot like you did earlier. I need to see at least the top and bottom layers along with the silk screen.

Ceramic capacitors with C0G/NP0 dielectric would be good for values below 100 nF. X7R for those higher than 100 nF.

Tom
 
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