How we perceive non-linear distortions

@peufeu I made seven .txt files (with Linux line breaks) with sigma-delta modulates from my sigma-delta modulator with embedded pulse width modulator working with DC input signals, see the attachment. They are 5.4 million lines each, one line per sample. Please skip the first 2000 lines of each file, as it is still settling there.

My sigma-delta modulator with embedded pulse width modulator is completely useless for DSD64, by the way, because its oversampling ratio is only one eighth of what it would have been if it were just a plain old single-bit sigma-delta. In fact I designed it to work well over the human and reasonably well over the feline auditory range at 28.224 Mbit/s, equivalent to DSD640. I later changed that to 27 Mbit/s, but that's still DSD612.244897959...

Regarding the interpretation of the offset numbers in the file names: 0.5 is the intended peak signal level, 0.73 is the highest it can handle without going unstable.
 

Attachments

Nice results! No idle tones and almost no noise modulation. Link to all plots. I used both linear and dB scale for the spectrogram.
I guess this confirms theory that multibit modulator can be fully dithered, but one-bit cannot...

SDout_offset0p00002.txt-lin.png
 
...guess this confirms theory that multibit modulator can be fully dithered, but one-bit cannot...

Which leaves us where, would you say? Eventually it will come to the question of why people often prefer the sound of high quality DSD instead of PCM. Maybe because of the component matching problem in physical multibit dacs? Maybe preference also depends on clock jitter/phase_noise levels (since DSD is said to be more sensitive to that factor)?
 
If PWM is clocked then isn't it discretized according the clock period? DSD data changes at the BCLK rate (although only on one clock edge). Seems to me that there is a clock frequency limitation either way. Don't see why a DSD dac couldn't play back a PWM signal (given the same clock rate). Its just a question of when to turn on or off the switch.

Also IIRC Chord Dave output is clocked at around 170MHz.
 
If PWM is clocked then isn't it discretized according the clock period?
Yes, but don't confuse a 1-bit modulator with a multibit modulator followed by PWM. The latter also has a 1-bit output, but it avoid problems in the 1-bit modulator. Of course PWM brings PWM problems but Mr. Putzeys has an elegant solution to that.
DSD data changes at the BCLK rate (although only on one clock edge). Seems to me that there is a clock frequency limitation either way.
Yes
Don't see why a DSD dac couldn't play back a PWM signal (given the same clock rate). Its just a question of when to turn on or off the switch.
It could. Playing DSD directly is a very bad idea anyway: you'd need to encode it as 1=long pulse and 0=short pulse to get the same number of transitions on every output bit. Otherwise, sequences "0110" and "0101" would have a different average amplitude, due to the rise and fall times... Or you'd have to use a charge transfer type of output, or anything else that absolutely ensures that what it outputs for each bit does not depend on the previous or next bits...

1660311750523.png


This makes PWM more advantageous because it already has this feature as long as you don't use one of the available levels.
 
Was just commenting in regard to the PWM sigma-delta modulator concept.

Don't know exactly what's in HQ Player, except IIRC they describe the algorithms named starting with letter A as adaptive. Don't know what they might do to make a PWM sigma-delta modulator adaptive.
 
It's about 0.016 % third harmonic for my valve DAC in PWM8 mode, I can't see any other harmonics (nor any non-harmonic peaks in the spectrum) with my rather basic measurement set-up.
Oh I meant measuring THD on the digital output, like putting sin(wt) as signal source in the code and FFT'ing the result (at 27Msps)...

Just checked HQPlayer: it's a 1-bit and it has idle tones. x512 version is similar, but lower noise

HqPlayer ASDM7 64.dsf_dc0.000001.jpg
HqPlayer ASDM7 64.dsf_dc0.000000.jpg