F5 Turbo Builders Thread

The Third wire in your mains cable is the Protective Earth (PE).
This green/yellow (in EU and others) goes direct to CHASSIS with no other joints and is mechanically fixed so that it can never fall off. It should preferably be short.
It must be PERMANENT. Don't dismantle it.

This is the connection that blows the mains fuse if the chassis ever comes into contact with a broken mains Live wire.
This PE is what prevents you killing your loved ones !
 
In addition, if your build has any exposed conductive parts, then these too should be connected to the protected chassis.
This includes metal sockets projecting through the chassis panels that have exposed metal parts that anyone could touch.
It also includes the metal shafts of controls that project through the chassis panels.
It also includes screw heads that project through insulated panels and could be touched.

Any EXPOSED conductive part should be connected to the protected chassis.
 
I am after some advice on F5Tv3, can't get my head around as to where to look for solutions

I am building v3 monoblocks, 42V rails, otherwise a standard F5T. Cascode ratio is 1/3 as in original documentation.
When powered on at zero bias the output gets almost full positive rail voltage, 40V

The front end, when unconnected, has no short circuit. The output boards have no short circuit. The PSU works normal.
When I put all together and power on, it is 40V DC at output.

Any ideas where to look for solution?

Thanks a lot in advance!


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MUR3020W

Hi
I want to add MUR3020W.
I use the cviller f5c turbo version1 board.
Is it okej to hardwire the MUR3020W in this way?
 

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What is your rail voltage? In the circuit the Jfets run at about 15% less than Idss. Multiply that by about 10% less than rail voltage and that will give the Jfet power dissipation roughly. Over 150mw, cascode it is the consensus among the experienced on this forum.

nash

Secondary around 26V(24V secondary, 115V primary, house hold 125V), DC could reach around 33V
using Nash guide and your numbers:
0.85*Idss * 0.9*Vdc < 150mW
If your Idss is 8mA and Vdc is 33Vdc, then you have 0.85*8 * 0.9*33 = 202mW.
That is well above 150mW.

I would aim for even lower than 150mW. I suggest <=100mW
10mA for Id @ 10Vds, or 8mA for Id @ 12Vds, or 6mA for Id @ 17Vds

Pmax for the To92 jFET is around 300mW to 400mW, running at 50% of Pmax raises the temperature a lot.
Aiming for ~40% of Pmax with a raised Ta inside the enclosure will still run the jFETs pretty warm.
 
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using Nash guide and your numbers:
0.85*Idss * 0.9*Vdc < 150mW
If your Idss is 8mA and Vdc is 33Vdc, then you have 0.85*8 * 0.9*33 = 202mW.
That is well above 150mW.

I would aim for even lower than 150mW. I suggest <=100mW
10mA for Id @ 10Vds, or 8mA for Id @ 12Vds, or 6mA for Id @ 17Vds

Pmax for the To92 jFET is around 300mW to 400mW, running at 50% of Pmax raises the temperature a lot.
Aiming for ~40% of Pmax with a raised Ta inside the enclosure will still run the jFETs pretty warm.

Thanks Andrew. Which basically means F5 Turbo V2 need cascade unless use around Idss 6.4mA JFETs or lower...
 
hot jFETs combined with high Vds leads to high gate leakage current.
They might have a very safe Vds rating when cold, but that changes (a lot) when you run them hot.

The datasheet will show gate leakage vs Temp.
The datasheet will also show gate leakage vs Vds.
I can't recall the datasheet showing the combination.
 
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