F4 Beast Builders

The basic idea of what the circuit might look like was done a while ago now. I have the circuit done in ltspice that I want to build and it looks pretty much the same as Lynn's circuit. It's just a matter of building and tweaking I don't have time to build it now though. With the right selection of cascode resistors, gate resistors and second stage output resistor the second harmonic is nearly eliminated at 1 watt output. Second stage bias is at 58ma.The bandwidth is at about 200khz.If the built circuits distortion is a tenth as good as the simulated circuit then it will be good.
 

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I like dominant 2nd harmonic. I just wanted to see how low I could get the distortion. Now I simulated it with cascoded pucks and it dropped even lower. I doubt that I can get that low in the real world but I hope that the lower it is in the simulation the chances are it is pretty low in the real world and worth building. Picodumbs and Lynn could maybe make some more accurate models, I don't have the knowledge to do that yet.
 
I like dominant 2nd harmonic. I just wanted to see how low I could get the distortion. Now I simulated it with cascoded pucks and it dropped even lower. I doubt that I can get that low in the real world but I hope that the lower it is in the simulation the chances are it is pretty low in the real world and worth building. Picodumbs and Lynn could maybe make some more accurate models, I don't have the knowledge to do that yet.

I am having a hard time nulling the 2nd harmonic. My measurements of the IXYS output fets indicates a good match of transconductance, but when the shapes of the Id vs. Vgs curves is carefully analyzed the 2nd harmonic of the undegenerated push-pull output stage, without feedback, has a fairly strong 2nd harmonic. When feedback is introduced, the phase delays appear to make it difficult to null the 2nd harmonic by tweaking the front-end. Perhaps I am missing something, but that is what I am seeing in both simulations and bench measurements. Perhaps my chioce of output fets (IXTN40P50P and IXFN48N60P) is not the best.
 
After reading your last post I realized I uploaded the wrong pic when I went back and edited it. I got discombobulated again. I didn't get the 2nd harmonic nulled completely until I cascoded the pucks. I didn't even notice I was working with that version of the circuit. The only difference in the circuits are the two extra pucks. I'm using the IXFK44N80Q3 in the simulation and I am only doing simulations at this time.
The bandwidth on mine is the same as the xa25 at 200khz, what is yours at Lynn?
 

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I'm looking at your data. Too many bloody data points. Hahaha
Can you minimise the data points or reformat the data so I can import into excel with out the brackets.

If you can fix it up, I'll have a go at making a model to match your data.

That is why I did the polynomial fits. You can generate the number of points to desire using the polynomials. Alternatively you could apply a 3rd or higher order smoothing filter to the raw data and subsample the results. Do you have MatLab or GNU Octave?
 
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:DThe circuits with the "normal" thermistor bias solution à la F4 seem all to be k2 dominant.

PR´s OPTO solution and RobLK solution with opto also, behave all more like PP stages. K2 is cancelled and k3 dominant.

I conclude that the thermistor bias solution makes the k2 effect!

(keen, and may be wrong!)

any other explanation?

:D
 

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:DThe circuits with the "normal" thermistor bias solution à la F4 seem all to be k2 dominant.

PR´s OPTO solution and RobLK solution with opto also, behave all more like PP stages. K2 is cancelled and k3 dominant.

I conclude that the thermistor bias solution makes the k2 effect!

(keen, and may be wrong!)

any other explanation?

:D

Do you have and estimate of the PSRR with the opto bias circuits. My concern is with the gate-to-gate connection or the opto circuit. You can test this by modifying the rail Voltage sources to have a 60Hz (or 50Hz) sine component and enabling the AC Amplitude of the voltage sources. Run AC Analysis and you will see how the sine component on the rails affects the outputs. I am also concerned about the need for higher rail voltages to allow full 25W output.