For a first mod project, forget it.
Even if you managed to solder fine enough insulated wires to the board there is a good chance of ripping the tracks off the board.
The only way I would consider doing this myself is if the I2S if fed from a PCB
sitting over the 9018 pins ensuring it is electrically and mechanically stable.
I think I am talking myself into this
re the i2s mod, it would be very unlikely to provide an improvement anyway even if you can do it without damage, given there would not be proper grounding, correct impedance, or termination on the i2s. the i2s at any cost madness makes no sense. i2s is not a cable connection standard and is very sensitive to board layout and similar considerations.
A small PCB could be made, with terminating resistors.
Line up the PCB with the 9018 pins and connect with only a few mm of wire.
The PCB could also connect the DAC inputs ala Buffalo mapping and provide
u.fl connectors.
Very fiddly, but not impossible.
all of that CAN be done of course, but the chances of actual benefits are highly doubtful. I didnt say impossible, just of dubious benefit even if done.
but it will be buzzword qualified, so I guess thats a benefit.
adding a few resistors isnt all there is to impedance matching … ufl connectors…ala buffalo? lol they were the LAST people to employ u.fl, under extreme pressure. but here they would provide very little, if any; actual benefit.
but it will be buzzword qualified, so I guess thats a benefit.
adding a few resistors isnt all there is to impedance matching … ufl connectors…ala buffalo? lol they were the LAST people to employ u.fl, under extreme pressure. but here they would provide very little, if any; actual benefit.
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Buffalo mapping.
u.fl connectors.
Individual statements.
Don't understand you comment on the u.,fl connectors,
they allow you to get signal onto the board with good integrity.
from a reasonable distance away.
The remaining non impedance matched very short wires from the PCB to the 9018 are no worse than, for example, .1 header to u.fl convertors.
So a little impedance miss match is worse than SPDIF ?
ahh OK, sorry about that.
umm, I think you'll find i've been using them and w.fl for years, i'm one of the reasons for them becoming popular here, I recommended them to Ian for the fifo when he was prototyping, commissioned Ackos first 4 teflon ackodac boards with them ~3 years ago, but here they just insert yet another impedance mismatch. the cable itself is good, but if the rest doesnt match and have continuity, tightly coupled with ground, they have much reduced value. all the impedance is in parts of the same connection (series isnt quite the right word) here remember, it doesnt come in discrete sections one after the other ...
not true, where is your ground to go with each wire going to come from? from the single DGND pin next to the i2s pins? besides .1" are completely unsuitable for i2s as well and should have left all but the cheapest of the cheap years ago, but at least if its designed in you can have an alternating ground for each connection. using a single wire (length is pretty much meaningless) for BCK in particular on ESS at up to 1.5MHz is craziness
little? you describe a series of 2 or 3 impedance mismatches and no proper return path, as well as whatever mess you make of the patch work.
the ESS reclocks it all using its clock anyway; i2s can be excellent with ESS, but its spdif implementation is pretty good, so hacking i2s input is of little actual benefit. so yes, I would be very surprised if it turned out any better (at the dac output) and you will have spent enough time and money to have just bought a DAC module that used u.fl in the first place, or had i2s
I would bet money doing as you describe would result in the dreaded ESS unlock issues and you would have to at a minimum use the widest DPLL bandwidth setting, even that may not work. spdif doesnt suffer from this.
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There are several problems with the simplicity of this statement, firstly, are the traces on the board 50 ohm, with a 50 oh, termination resistor, with a 50 ohm source that is at 6V because the entire system is a voltage divider, now the pcb impedance needs to be 50 ohms at both the source and at the dac. now this is for there to be any Conseivable difference even in theory.
Now you must note that the ess dac has ASRC and as such the jitter on the input lines does not matter all that much. So the only line that realy needs such special attention would be the line for an external clock. That is the ONLY signal that should be transmitted coaxially. The rest should have a CML transceiver.
The other thing that I see that might be actually kind of usefull and never seems to be implemented is a guard for the analog outputs. Seriously this is a current line you guys should be guarding the signal.
Now you must note that the ess dac has ASRC and as such the jitter on the input lines does not matter all that much. So the only line that realy needs such special attention would be the line for an external clock. That is the ONLY signal that should be transmitted coaxially. The rest should have a CML transceiver.
The other thing that I see that might be actually kind of usefull and never seems to be implemented is a guard for the analog outputs. Seriously this is a current line you guys should be guarding the signal.
Are you saying that most implementations, with say FR4 boards and a mixture of u.fl and ribbon cable interconnects are pretty much hit and miss ?
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who mentioned 50ohms resistors? who recommended u.fl here? who are you talking to that made this simple statement? deanoUK?
not a chance the traces on this board are 50Ω its a 2 layer board and reasonably thick, so there is no room for the width needed.
with the rest of your statement however it seems you believe the ESS marketing too much. jitter on BCK especially does actually make a difference to performance, especially wrt the unlock syndrome that plagues less than well thought out ESS dacs (especially with default register settings). the impedance (also as you mention, divider/voltage drop) calculation needs to include source impedance and any transceiver or flip flop, so will vary. I do use u.fl and w.fl on my current dac, but after the clock buffer there is 33Ω->u.fl/w.fl cable->22Ω/47KΩ (dual termination) on the dac board, which has w.fl for the i2s and u.fl for the MCK. but then i'm using boards that are made for each other.
agreed on the guard line, but this PCB hasnt got the basics right, so you cant expect that. I dont/wouldnt use this dac, but they have to work with what theyve got, in which case I have recommended against trying to add i2s
not a chance the traces on this board are 50Ω its a 2 layer board and reasonably thick, so there is no room for the width needed.
with the rest of your statement however it seems you believe the ESS marketing too much. jitter on BCK especially does actually make a difference to performance, especially wrt the unlock syndrome that plagues less than well thought out ESS dacs (especially with default register settings). the impedance (also as you mention, divider/voltage drop) calculation needs to include source impedance and any transceiver or flip flop, so will vary. I do use u.fl and w.fl on my current dac, but after the clock buffer there is 33Ω->u.fl/w.fl cable->22Ω/47KΩ (dual termination) on the dac board, which has w.fl for the i2s and u.fl for the MCK. but then i'm using boards that are made for each other.
agreed on the guard line, but this PCB hasnt got the basics right, so you cant expect that. I dont/wouldnt use this dac, but they have to work with what theyve got, in which case I have recommended against trying to add i2s
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Sorry, posted from my ipad. Qsup beet me to the punch and stated things much more elloquently. The problems are with the idea that just by moving to a coaxial connector for I2s transmission you will gain something for nothing.
The problem is that unless you have a matched impedance system of some kind you really will not get good results from long cable. This is inherent to how em waves propagate allong a wire. At 100Mhz 1/4 the wavelength is 75cm. Thus it is easy to see that you will have trouble when dealing with fast rising edges without proper termination. Having a 50 ohm transmission medium can actually make things worse for reflections in this case due to the higher Q of the resonator.
The problem is that unless you have a matched impedance system of some kind you really will not get good results from long cable. This is inherent to how em waves propagate allong a wire. At 100Mhz 1/4 the wavelength is 75cm. Thus it is easy to see that you will have trouble when dealing with fast rising edges without proper termination. Having a 50 ohm transmission medium can actually make things worse for reflections in this case due to the higher Q of the resonator.
Missed you again qusp.
Was not commenting about what you said at all. Sorry if i didn't make much sense, as reading it again, i didn't.
Btw, i did not think that jitter on the bclk line does not matter. And i agree that this board does not warrant I2S. My take on a ESS dac has been in the brewing for about 2 years, and I am in the process of finalising schematics. I hope I can get your input when I post details. Of course this is after i finally finish writing those protection board instructions. (Damn medical problems)
Was not commenting about what you said at all. Sorry if i didn't make much sense, as reading it again, i didn't.
Btw, i did not think that jitter on the bclk line does not matter. And i agree that this board does not warrant I2S. My take on a ESS dac has been in the brewing for about 2 years, and I am in the process of finalising schematics. I hope I can get your input when I post details. Of course this is after i finally finish writing those protection board instructions. (Damn medical problems)
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This is all extremely interesting, but,
I am Confused as to who is the above "you".
Please note I edited my last post .
Deano, FR4 vs Rogers PTFE isnt a big thing here, it was more about taking it the whole way
the problem is with 2 layer boards the dielectric layers are generally quite thick, so the copper foil layers are farther apart than on a 4 layer board for example. what this means is to have a 50Ω transmission line the trace needs to be quite wide, too wide to have it routed neatly; it simply doesnt fit.Deano, i'm pretty sure you are you
in both cases@ Ashaw:
no worries hehe, dont worry mate, I know the deal, posting from phones, its rife with issues. it did cause me to give a bit of a WTF? though
no probs on the layout, shoot me a PM sometime if you like. been head down bum up with my head buried in Henry Otts masterpiece lately working on something myself. takes time though to do properly as you know, not cut and paste ...
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Deano, i am not saying that they are hit and miss, however i am saying that many people here have little or no understanding of RF electronics, and it shows in how they implement what really is an RF problem. There is a reason why no modern tech uses CMOS voltage levels on anything critical. There is also a reason why high speed circuits are made on 8 layer boards most of the time. The entirety of these problems have a lot to do with parasitics and resonances. I am not saying I am an experienced RF engineer, far from it however there is a lot of disinformation around about things that have been know in hard fact and the rf literature for decades, if people would just think to look for it.
The thickness being a problem is not strictly true. One could design a double sided board that has the correct impedance using co-planar waveguides. Does this board, no. Would I recommend doing an ESS dac with two layers, no. Tis is not however due to there being a problem with impedance matching.
Does a good board for this need a Teflon board, absolutely not. However even 4 layers cannot really do an ideal design to complement this dac. After a LOT of thought over a few years, i have decided that my board will be 2+4+2 layers, and that is as few as I am willing to go. I would actually prefer to have one with 3+6+3 layers, however the cost there is high at about $120 per pcb and i do not quite feel that I can justify that.
The thickness being a problem is not strictly true. One could design a double sided board that has the correct impedance using co-planar waveguides. Does this board, no. Would I recommend doing an ESS dac with two layers, no. Tis is not however due to there being a problem with impedance matching.
Does a good board for this need a Teflon board, absolutely not. However even 4 layers cannot really do an ideal design to complement this dac. After a LOT of thought over a few years, i have decided that my board will be 2+4+2 layers, and that is as few as I am willing to go. I would actually prefer to have one with 3+6+3 layers, however the cost there is high at about $120 per pcb and i do not quite feel that I can justify that.
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but without coplanar waveguides, being even more alien here
, the thickness (and FS) is a factor for determining the width of the trace needed and waveguides are going to require impedance controlled layout are they not? cheaper to just get a multilayer board in many cases these days. yeah i'm looking 6 layer, not 8, still too pricey unless you have the ability to run it with other company material like you perhaps. depends, maybe by the time i'm done it'll be cheap enough. most of the logic with mine will be off board though with flex PCB interconnects so its not such a big deal.I wish the ESS came in a BGA package option
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I was poking around with my 'scope the other day, trying to find out what as wrong with a n other USB->12S adaptor.
Looking at the LR and BCK on one of my fully synced Amanro->AKO isolator/reclocker->Buffalo III I was surprised how clean they looked.
So I was wondering what one could "get away with" on a lesser setup.
Hence the idea of hacking up the Weiliang board.
I am all too aware of the lock problems with the 9018, having built a 4 off 9018 in one box with USB input and having to deal with the I2S distribution.
I now need more than 16 channels so I am forced to go AES anyway.
Looking at the LR and BCK on one of my fully synced Amanro->AKO isolator/reclocker->Buffalo III I was surprised how clean they looked.
So I was wondering what one could "get away with" on a lesser setup.
Hence the idea of hacking up the Weiliang board.
I am all too aware of the lock problems with the 9018, having built a 4 off 9018 in one box with USB input and having to deal with the I2S distribution.
I now need more than 16 channels so I am forced to go AES anyway.