Dear friends,
I wonder, did someone has succeeded to operate the AD1862 with I2SOVERUSB on 16X rate?
In datasheet it is written up to 16X, but I have succeeded only up to 384k (so 8X).
PCM63 can work with I2SOVERUSB up to 768K. I tested it. I have Parasound DAC 1000, so I could check.
Thanks,
Guy
I wonder, did someone has succeeded to operate the AD1862 with I2SOVERUSB on 16X rate?
In datasheet it is written up to 16X, but I have succeeded only up to 384k (so 8X).
PCM63 can work with I2SOVERUSB up to 768K. I tested it. I have Parasound DAC 1000, so I could check.
Thanks,
Guy
Yes, I don't care I just wonder why in the datasheet it is written the DAC supports X16 and in practice only up to X8.
I gave the example of the PCM63 just to show, it is not a matter of I2SOVERUSB that can't support.
Hence, anyone has succeeded?
Clearly, the shift registers on original Miro's board can't handle (maybe faster registers are needed).
I gave the example of the PCM63 just to show, it is not a matter of I2SOVERUSB that can't support.
Hence, anyone has succeeded?
Clearly, the shift registers on original Miro's board can't handle (maybe faster registers are needed).
Have you tried the ad1862 board where you can stack the JLSOUNDS and avoid the registers ? At that speed if the registers I would try only the uf-l cables board version, I'm superstitious 🙂
@gaycoh You will need to shorten the sample size (word length) and make it simultaneous in the converter (so the CLK is reclocked and clock the signal into both DACs simultanly), (standard stereo I2S word length is 2x32bit).
example:
BCK frequency from standard stereo I2S: 48kHz * 2*32bit = 3.072MHz
if this BCK is not reclocked and is used directly for the x16 overclocked AD1862: 3.072MHz * 16 = 49.152MHz --- way over limit (limit for the AD1862 is 17MHz)
converter (CPLD or FPGA based) can store and prepare DATA and create reclocked CLK for DAC, then it does look like this: 48kHz * 20bit * 16xFS = 15.36MHz for each DAC (both DACs are clocked and latched together)
... it is all only about understanding how the frequency is changed and the frequency limits 😉
PCM63 has higher quaranted frequency (25MHz is guaranteed) and higher frequency can also work (but some bits may be missing or skipped) - I do not recommend doing this large oversampling without checking how many MHz the converter has
example:
BCK frequency from standard stereo I2S: 48kHz * 2*32bit = 3.072MHz
if this BCK is not reclocked and is used directly for the x16 overclocked AD1862: 3.072MHz * 16 = 49.152MHz --- way over limit (limit for the AD1862 is 17MHz)
converter (CPLD or FPGA based) can store and prepare DATA and create reclocked CLK for DAC, then it does look like this: 48kHz * 20bit * 16xFS = 15.36MHz for each DAC (both DACs are clocked and latched together)
... it is all only about understanding how the frequency is changed and the frequency limits 😉
PCM63 has higher quaranted frequency (25MHz is guaranteed) and higher frequency can also work (but some bits may be missing or skipped) - I do not recommend doing this large oversampling without checking how many MHz the converter has
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Miro,
.
Thanks for your answer, also to Bohrok.
I mentioned the registers in original board (by the way) as a clear example that can't work X16 as is.
What I said, I tried to operate the AD1862 directly by the I2SOVERUSB on X16 (no registers and as Lyubem suggested in his manual).
The PCM63 on my Parasound (after bypassing the CS receiver and digital filter) can handle 768K without problem. So, I wonder if someone has succeeded to operate the AD1862 driven by the JLSoumd directly at 768k?
.
Thanks for your answer, also to Bohrok.
I mentioned the registers in original board (by the way) as a clear example that can't work X16 as is.
What I said, I tried to operate the AD1862 directly by the I2SOVERUSB on X16 (no registers and as Lyubem suggested in his manual).
The PCM63 on my Parasound (after bypassing the CS receiver and digital filter) can handle 768K without problem. So, I wonder if someone has succeeded to operate the AD1862 driven by the JLSoumd directly at 768k?
If you have a scope you could check what is the clock frequency (AD1862 pin 5). If it is above 17 MHz AD1862 does not work but PCM63 does work.
I will check, you are right I should check it before. Just was taking the AD1862 datasheet as truth, see it is written support X16.
I actually don't know how the I2SOVERUSB work.
Is it 768k*20*2 or 768*32*32, in both cases it is higher than 17Mhz 🙂 so, in any case how they can write support X16 when the limit is 17Mhz?
I actually don't know how the I2SOVERUSB work.
Is it 768k*20*2 or 768*32*32, in both cases it is higher than 17Mhz 🙂 so, in any case how they can write support X16 when the limit is 17Mhz?
AD1862 supports 16x but word length should be 20 (48*16*20 = 15.36MHz). Some digital filters can output 20bit word length.
OK, first, maybe I am wrong. Don't we need to multiply the sample rate by bit depth and number of channels? That the 2 I have in my formula but you don't?
Second, I checked: I am working with MAC OS, with Audirvana and test files are generated by Matlab. The Audirvana recognize correctly the sample rate. With 768K leg 5 on AD1862 shows about 24Mhz, fits to 32 bits with your formula (no multiplication by 2 and 32 bits).
With 384k leg 5 shows about 12Mhz.
Second, I checked: I am working with MAC OS, with Audirvana and test files are generated by Matlab. The Audirvana recognize correctly the sample rate. With 768K leg 5 on AD1862 shows about 24Mhz, fits to 32 bits with your formula (no multiplication by 2 and 32 bits).
With 384k leg 5 shows about 12Mhz.
No, as AD1862 works in PCM format where both DL and DR are simultaneously latched by LE.
OK, sorry, you are right, not multiplication by number of channels to compute CLK.
I looked again in PCM63 datasheet and it is written 25Mhz guarenteed.
I looked again in PCM63 datasheet and it is written 25Mhz guarenteed.
Thank you for your help, it seems no way to operate the AD1862 in 768k. Not only we need to truncate the word to 20bit or latch in correct times, we need also to reduce the clock. A dedicated circuit is needed. Anyway, it is not important, for me it was important to understand why there is like a mistake in AD1862 datasheet. It is hidden by the multiplication 768*20