DAC AD1862: Almost THT, I2S input, NOS, R-2R

I would be interested in your opinion on the best way to drive the AD1862 balanced.

1.) 4 x AD1862 (2 x inverted). The problem could be unlinearities of the mono chips.

2.) 2 x AD1862 (like here in miros projekt) and then balanced i.e. by a dual opa (OPA1622) plus some precision resistors. This means that beside an inverted branch a non-inverted branch is generated.
 
Ordering boards for Miros 1862 DAC

@TJF
Unfortunately I was too lame to grab me 1 of the 2x5 packs of boards for Miro so I guess, I will have to order em by myself. I haven't donr this, so may I ask you to please tell me were you ordered and which set of info the board supplier requires.
View attachment diyAudio_AD1862_DAC-rev1.1_2020-06-20_JLCPCB-Gerber.zip

Is this set of info still up to date?
 
@TJF
Unfortunately I was too lame to grab me 1 of the 2x5 packs of boards for Miro so I guess, I will have to order em by myself. I haven't donr this, so may I ask you to please tell me were you ordered and which set of info the board supplier requires.
View attachment 981507

Is this set of info still up to date?

Go to PCB Prototype & PCB Fabrication Manufacturer - JLCPCB and upload this gerber-zip-file. I think it looks like the latest file. That's all ;)

Look at the price for shipping... and choose a "normal" kind of shipping ...
 
@TJF
Unfortunately I was too lame to grab me 1 of the 2x5 packs of boards for Miro so I guess, I will have to order em by myself. I haven't donr this, so may I ask you to please tell me were you ordered and which set of info the board supplier requires.
View attachment 981507

Is this set of info still up to date?


I'm waiting for mine, they should arrive soon.
Will sell the rest, I only need one.


If you can wait...
 
I would be interested in your opinion on the best way to drive the AD1862 balanced.

1.) 4 x AD1862 (2 x inverted). The problem could be unlinearities of the mono chips.

2.) 2 x AD1862 (like here in miros projekt) and then balanced i.e. by a dual opa (OPA1622) plus some precision resistors. This means that beside an inverted branch a non-inverted branch is generated.

For those who are interested. I have found some answers on the subject in a PCM1704 thread (all tend to the analog solution):

hagtech
Garbz
Jocko Homo
Jocko Homo
 
I would be interested in your opinion on the best way to drive the AD1862 balanced.

1.) 4 x AD1862 (2 x inverted). The problem could be unlinearities of the mono chips.

2.) 2 x AD1862 (like here in miros projekt) and then balanced i.e. by a dual opa (OPA1622) plus some precision resistors. This means that beside an inverted branch a non-inverted branch is generated.

Hi, Thomas,

I can, maybe, help with that. The first question is, what are you hoping to gain by a balanced (actually, differential) configuration?

Objectively, there are three benefits:
1) A net I crease in SNR, of 3dB.
2) Some cancellation of even order distortion.
3) Reduced signal induced modulation of the power supply.
4) Common-mode noise rejection only becomes a benefit should the two anti-phase signals be applied to some following circuit featuring good common-mode rejection. Which is usually a differential amplifier.

Whether those benefits apply to the DAC section as well as the analog section depends on both sections are included in the differential configuration. In other words, are the anti-phase signals being created in the digital circuitry, or only in the analog. If only the analog circuits, then DAC distortion and noise reduction are excluded from the benefits. I’ve always felt that the DAC section should be included, else why bother. To create the anti-phase signals digitally will, of course, require twice the number of DACs. A correct digital word inversion of the two’s complement data format requires inverting every bit of the input word, and adding 1 LSB. The bit inversion is exceedingly trivial. The adding of 1LSB is not, and would require significant additional logic circuits.

So, what happens if we only invert the bits, but do not add the 1 LSB? A constant 1 LSB digital D.C. offset, is what. What does that amount to? For 16-bit per sample data, which is the worst case, as the offset becomes smaller as the per sample data size increases. For 16-bit data, and a typical 5.656V peak-peak analog output swing, 1 LSB = (5.656/65,536) = 8.63uV. Contributing an -8.63uV D.C. offset at the analog output amplifier. The offset is negative, because it is missing from a properly inverted signal. This is far lower than the D.C. offset produced by most op-amps, so, I feel that it is a completely negligible contribution to the total offset.

All that’s required for implementation is to send the normal serial data signal to one DAC, and also send that same signal to the opposite DAC through a single logic inverter. That’s all. I’ve implemented this myself in a AD1865 based NOS DAC which I had designed and built. It works transparently.
 
Hi Ken,

thank you for your contribution!

I’ve always felt that the DAC section should be included, else why bother.

Yes. However, we are dealing here with the generation of DACs that were basically built unbalanced (AD1862, PCM1704). The following generation was then built balanced (e.g. PCM1794). But these were no longer R2R DACs.

The question here is what happens when you balance separate and unequal (in the sense of separate) DACs. In the above mentioned thread it is about experienced voices, which speak in the case of the PCM1704, of too large "unlinearity".

You look at the aspect of the voltage. This can be solved analog very well with a few precision resistors - if I understand you correctly. The question is whether with "unlinearity" perhaps the time is meant or ...?

The implementation of the inversion whether on digital or analog level is not a problem.

Regards
Thomas
 
...The question here is what happens when you balance separate and unequal (in the sense of separate) DACs. In the above mentioned thread it is about experienced voices, which speak in the case of the PCM1704, of too large "unlinearity".

Regards
Thomas

With resistor quantizer based DACs the linearity depends, of course, on the accuracy of the resistors. Which typically are laser-trimmed chromium-dioxide. The resistors will have a Gaussian value distribution within some manufacturing tolerance range. Which means that different DAC chips will have different resistor values distributed somewhere around the mean, but not at exactly the same value. Paralleling such DACs has the effect of narrowing their net inaccuracy toward the mean value, improving linearity of an array. So, a parallel array of such DACs is statistically likely be more linear than a single DAC.

An differential configuration of two DACs, however, electrically connects their outputs in series. Making it possible for the inaccuracy of each DAC to sum together, depending on where in the distribution those inaccuracies happen to fall. Which could result in a net increase in non-linearity. Primarily manifesting as an increase in odd-order distortion, as any increase in even-order distortion tends to be nulled by the differential configuration.

In summary, parallel connecting resistor type DACs can provide some reduction in THD, and an 3dB increase in SNR. Series connecting such DACs could possibly result in a increase in odd-order distortion, a reduction in even-order distortion, and a 3dB increase in SNR. It's not necessarily simple to predict the net distortion effect of a differential configuration. By the way, differential outputs became popular on commercial DAC chips because they enable the use of a single polarity supply voltage, lowering system implementation cost.
 
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