mgm2000ro, To say "interesting", it was very overpriced for vegalab class D thread. I hope, bender have the same opinion -Be careful, to read liars.
IVX, unfortunately it's true 🙁 There are a lot of newbies like me and few DIY'ers understanding D building, latter time maybe nobody 
Most schematics came from diyaudio.
Most schematics came from diyaudio.
Workhorse...Just a question....How work your circuit at clipping, ie when their is no more carrier?
;-)
Fredos
;-)
Fredos
fredos said:
Well good point, but I think Toino had given a Hint!
ECLER DT4800 monitors both the Inductor current and voltage across the Zobel capacitor to determine the conditions for triggering....
How can you have an image of current over the zobel capacitor at clipping when zobel act as impedance damper??? I miss something important???
Fredos
Fredos
It doesnot give you current image, but lets you to obtain the voltage across it....fredos said:
Measure the voltage and check the waveform accross zobel cap during clipping and also SC....
Hint: During Idle no signal 50% dutycycle conditions you will have a Triangle or sinus type waveform across that cap...but during abnormal conditions it changes....
Attachments
Yeah, it follow modulation and give clipping image, but what about current image? Voltage accross secondary winding on output coil will peak at 25 and 75% duty cycle, with some variation depend of the load and reach zero volt at 0 and 100% duty cycle (clipping)...So how to protect an amplifier with this???
Fredos
Fredos
fredos said:
The Analog Signal Current is still flowing through the coil when subjected to short-circuit or overcurrent conditions
Check the waveform and measure the voltage across secondary, when amp is subjected to high Clipping+Overcurrent simuntaneously.......You will see a new thing....
I already try that, but core saturation at clipping make this signal to be loss...And core saturation is normal at low frequency clipping!
Fred
Fred
fredos said:
You have left one important parameter.....have you measured the voltage across the Zobel cap during Core Saturation[hard clipping into low frequency signals]....if not then do it...you are much closer to something....ECLER uses this both to get the info about SC/Clipping/OC/CS .....
Hi
Maybe it would be better if I would say swap the HI and LO, so I could connect them easyer on board.
So would anything be diffrent?
Maybe it would be better if I would say swap the HI and LO, so I could connect them easyer on board.
So would anything be diffrent?
of course that this matter, with swaped HI and LO you practically inverting logic so opamp would never be able to compensate error...
BTW ....think about, if you are right hended and decide to swap your understanding logic of what is left and what is right and then try to write with right hand......
I think that forum member TitanChen accidentally swaped pwm signals which resulted in excessive power consumption on idle. And with self oscillation topology might inhibit propper startup.
BTW ....think about, if you are right hended and decide to swap your understanding logic of what is left and what is right and then try to write with right hand......
I think that forum member TitanChen accidentally swaped pwm signals which resulted in excessive power consumption on idle. And with self oscillation topology might inhibit propper startup.
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