You may have to make sure the DAC is powered up *after* the Cronus if you are going to run sync with the stock firmware. I had to tweak this a bit on mine.
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Absolutely, I am right doing so right now.
I know Miero and a few others have as well.
Just curious as to your configuration compared to mine. Does Cronus board revision have anything to do with it? I have v1.2 board, the first pics were of a v1.1 board. It looks like MCK has a different path between the two boards?
Thanks,


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So I powered first cronus combo and after that b3 with your controller running on it.
I still can`t stream no 384khz sample rate files with oversampling filter on neither off.
I noticed again what I was saying to you 6 months ago when I had started the first topic about this neverending problem and that is : b3 goes mono when I turn off sw2:4.
The dac was connected sync.
I still can`t stream no 384khz sample rate files with oversampling filter on neither off.
I noticed again what I was saying to you 6 months ago when I had started the first topic about this neverending problem and that is : b3 goes mono when I turn off sw2:4.
The dac was connected sync.
Why are you mentioning OSF On and Off? Leave it on. All that you need to be doing is changing the DPLL. Flip SW1:5-8 all to off
Finally it works 
Yes it does 🙂 this time is streaming flawlessly 384khz files in sinc. This is with my controller unit, maybe I will test it with yours too one of these days and report back.
Cronus mck is connected through the 33r resistor directly to b3 mck input.
There was no buffer in the middle.
B3 100mhz vcxo was also disoldered.
And not in the end A BIG THANKS 😉

Yes it does 🙂 this time is streaming flawlessly 384khz files in sinc. This is with my controller unit, maybe I will test it with yours too one of these days and report back.
Cronus mck is connected through the 33r resistor directly to b3 mck input.
There was no buffer in the middle.
B3 100mhz vcxo was also disoldered.
And not in the end A BIG THANKS 😉
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I don't think it was the 100mhz vcxo. It didn`t worked with the vcxo disoldered until I have inserted that impedance matching resistor.
Until now I have streamed only 384khz sample rate files. Today for curiosity I have downloaded few 352.8khz files.
When streaming the late ones the dac is acting exactly like in the past. It won`t lock.
It`s strange that it locks to 384khz files.
Until now I have streamed only 384khz sample rate files. Today for curiosity I have downloaded few 352.8khz files.
When streaming the late ones the dac is acting exactly like in the past. It won`t lock.
It`s strange that it locks to 384khz files.
I have also resoldered r8 and r9 in place thinking maybe it will solve the problem but still nothing.
It will stream 384khz files correctly but not 352.8khz
It will stream 384khz files correctly but not 352.8khz
To be clear I mean the clock gate of the DAC is also likely damaged. Unfortunately not that uncommon - ESD is evil.
It could also simply be that your firmware is trying to do things when the DAC is not ready. Your firmware has to deal with things like the DAC resetting itself when the master clock goes away or is switched.
This is why I say - unless you really know what you are getting into - go async.
It could also simply be that your firmware is trying to do things when the DAC is not ready. Your firmware has to deal with things like the DAC resetting itself when the master clock goes away or is switched.
This is why I say - unless you really know what you are getting into - go async.
It is also possible that just that one clock on that Rhea is damaged. I really have no way to know.
The only systematic reason (outside of a hardware/setup failure) I know of that could cause that is a firmware problem.
Keep in mind technically at ~50mhz we are operating outside the normal OSF limits for PCM.
In order to make that work the DPLL has to be wide open.
To run the DPLL at any other setting would mean need double the clock frequencies. Other wise you would lose lock just as you are seeing. This is why we run a 100Mhz clock on the B3.
Keep in mind technically at ~50mhz we are operating outside the normal OSF limits for PCM.
In order to make that work the DPLL has to be wide open.
To run the DPLL at any other setting would mean need double the clock frequencies. Other wise you would lose lock just as you are seeing. This is why we run a 100Mhz clock on the B3.
I had always the dpll set up to freewheel as you say. This with my controller and yours too.
If I don`t connect no controller to the dac he should get the default configuration automatically.
Even so the dac will play 384khz files but not 352.8khz
I really don`t want to go back async because to me it sounds better sync and for this I bought the reclocker combo.
When I go async I don`t feel much of a difference with the reclocker in or out
If I don`t connect no controller to the dac he should get the default configuration automatically.
Even so the dac will play 384khz files but not 352.8khz
I really don`t want to go back async because to me it sounds better sync and for this I bought the reclocker combo.
When I go async I don`t feel much of a difference with the reclocker in or out
We are talking in circles - all I can recommend you do is to replace the one (44.1 base) Rhea clock. It may be damaged. Failing that there may be DAC damage.
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