Comparative VAS+cascode stage

[sandrohv]

Hi Hayk,

Your proposed circuit is not operational

I missed one wire. See the attached circuit... I drew it at 2am hence why I messed up the circuit and your name... sorry about that.

The best output stage I have is 0.016% 60w 10khz. LKA proposed excellent triple cascade emitter followers , may be best state of art ,has 3.5% Dtot

Can you share your 0.016% OPS?

Regarding LKA's circuit, is it the one in the attached picture?

 

[LKA]

Applying simple EC to the 3EF OPS = 0.00x distortion up to 25W/4R in the whole audio band

 

[sandrohv]

Hi LKA, can you share a .asc? Thanks!

BTW, you avatar picture looks like a 1984 Sardaukar from Dune.

 

[LKA]

It is me ... welding helmet

 

[sandrohv]

It is me ... welding helmet

Thanks! What does LKA stand for?

See attached photo: Sardaukar vs. LKA

 

[U130421]

Your circuit is still un operational.

LKA , you drive your OS with 100 ohms source, modern VAS , has very high impedance for full spectrum.

 

[U130421]

This configuration looks very attractive, The very low even harmonics means no need to push pull. I will see how to reduce the 7v drop out.

 

[Walkalone]

Hi Hayk,
You can try this one.

Regards,
Cuong Nguyen

 

[U130421]

The FZT can be replaced? I don't have spice model. This mirror has current gain of 1 I suppose. The collector of FZT is grounded?

 

[Walkalone]

Yes, it maybe replaced. The ratio is 1:1 due it's load of VAS stage. Just only take a picture from my amp.
Change it to 10:1 as you want.

Regards,
Cuong Nguyen

// Collector of FZT be connect to GND or V+ rails. In my design, its connected to V+rail because i want design look as op-amp, not ref. with GND.
This thing cause FZT will dissipate more heat.

 

[U130421]

With unity gain & gain of 10. Biased 2ma.

 

[Walkalone]

Main reason i use FZT because its high Hfe single transistor. It reduce offset of current mirror. Some other descriptions use MOSFET due its advantage that Gate current near as zero.
So, the solution i have are:
1. Use high Hfe devices, beta enhanced config etc...
2. Small signal MOSFET

Regards,
Cuong Nguyen

 

[sandrohv]

Your circuit is still un operational.

The circuit is quite operational, see below. Give it a go with your setup and models, let's see what it gives. I don't want to do it on my end due to different simulator/models/settings/etc.
Also, it does need some compensation to keep it stable, see the second plot.

 

[U130421]

It looks pretty good.

 

[U130421]

Using adequate transistors the distortion is halved .With IS1 1ma it becomes 0.059%. With 50v supply it is 0.039%.

 

[U130421]

With MOSFET it is better than the target.

 

[U130421]

It shows a second pole about 20Mhz easy to deal with.

 

[sandrohv]

Looks good... not bad for just 4 transistors.
I am amazed the MOSFET got us 10x distortion reduction.
In the BJT version, T4 corrects base current error due to Early Voltage, and errors due to CJC.
In MOSFET version, T4 only corrects for CJD.
This means that the base current error is quite dominant given we got that 10x reduction.
Here is a test, what happens if we repeat the test with the circuit in #35 using a PNP (T4) with higher Beta (increase the model beta by 10x).
My theory is that distortion should go down substantially... tbd.

 

[U130421]

I passed the beta from 845 to 8450 the distortion fell from 0.06% to 0.04%.
The circuit on 27 is only two transistors with lower distortion but lower second pole .

 

[Mark Tillotson]

I am trying out different types of VAS+cascode stage for lowest distortion. These are the ones I tested. Please ,suggest other ones I try out.
The stage must provide a current gain of 10, to bring the 1M ohm load to +/-30v 10khz.

The first circuit has anomolously high distortion, yet its output swing isn't excessive, so I suspect the cascode device base voltage is too low - the current through R2 is stealing from the available voltage. Try making the voltage bias for the cascode 2V or 2.5V maybe?


Perhaps change R2 to 100 ohms also, it would normally be pretty small if present.