Member
Joined 2009
Paid Member
[link fixed]
I don't understand your feedback loop. It looks as if the series resistor is only 470R and the shunt to ground is 4k7. This means you have massive feedback and hardly any closed loop gain - or I'm missing the point altogether ?
kgrlee said:
Many thanks.
The feedback network is the 2 x 470 (R4/5) and the single 14.1 (R12).
R7/8 (4k7) are just part of the biasing network. In the 'real life' amp, C1/2 will be large but this will hardly affect the feedback or gain
I looked at those schematics, they are capable of 100W/8ohm, but you presented the results at 50W/8ohm, and claimed sub ppm distortions with over 6MHz ULGF. This is what very smokes the mirrors, any VFA with the same ULGF and output stage can be tuned for the same (or better) performance. The so-called CFA topology can't provide more loop gain for the same ULGF and the same order of compensation network or, equivalent, for the same ULGF, loop gain and order of compensation network, it can't provide more stability margins.
Your amp is overshooting, it's obvious from the gain phase diagram, why are you surprised by the step response? Also obvious, the ULGF is down to 4MHz. 6MHz vs. 4MHz, you just got PIM - not surprising given you pushed the ULGF so high. It always happen with high ULGFs, and is in particular worse for vertical mosfet output stages (due to the abrupt variation of Cgd with Vgd approaching zero). Even if a bipolar driver is added like in your schematics, it can provide only so much isolation.
I am less optimistic about cancellation techniques if one believes that sound quality is more dependent on high-order distortions than softer low-order distortions. If all one wants to do is reduce THD as a whole, error cancellation will bring it down mainly by knocking down 2nd and 3rd. Cancellation techniques, just as with NFB, generally become less effective as frequency is increased. The behavior of most feed-forward techniques is a good example. As usual for me, I'm paying much less attention to 1kHz THD than to 20kHz THD or other high-frequency distortions.
In a power amp with the usual class AB output stage, it may be very difficult to do effective cancellation of, say, the 5th and 7th harmonics of 20kHz. A class A amp might be a different story, since its nonlinearities will tend to be softer.
This all does not mean that we should not try cancellation techniques - it just means that we have to manage our expectations.
Cheers,
Bob
Yes, Bob.
This said, on a pure subjective point of view, i tend to prefer class AB with reasonably high class A quiescent current (enough for average levels).
May-be the little distortion on short high peaks increase the feeling of dynamic ?
About this stupid (yes it is) 50W/100W number controversy, who play his amp with less than 3dB margin ?
50W is a good basis to compare amps distortion.
This said, on a pure subjective point of view, i tend to prefer class AB with reasonably high class A quiescent current (enough for average levels).
May-be the little distortion on short high peaks increase the feeling of dynamic ?
About this stupid (yes it is) 50W/100W number controversy, who play his amp with less than 3dB margin ?
50W is a good basis to compare amps distortion.
Last edited:
Member
Joined 2009
Paid Member
I see it now. But the quality of your feedback loop now depends on the accuracy of the two voltage sources - I'm not sure you avoided the problem I mentioned at all, you just shifted the burden ?
Yes, I like high quiescent current as well; just beware of gm doubling crossover distortion in some conditions. Over-bias of class AB is definitely the lesser evil to under-bias.
The most straightforward way to achieve higher optimum class AB bias with a given RE for thermal stability is to just add more output pairs. Then some other things get better as well; for example, more SOA => less agressive protection circuits. Less high-current beta and ft droop as well.
Cheers,
Bob
Hi Bob,
Could you comment on Waly post and PIM in my simulations. I am reading your book about PIM at the moment and I am not sure how much of PIM could be produced in case of my simulations.
BR Damir
I tend -i believe like you- to prefer power mosfets. Most of the time, they are are temp flat at around 150mA. Happily, it appears that it is the best sounding bias to my ears (with my high efficiency speakers). Relationship ?
Your tip is clever: setting the quiescent of output devices for the best sound/temp behavior, then multiply the devices if more average power is needed. With all the added benefits of paralleling them.
It was repeated here and elsewhere ad nauseam that in class AB power amplifiers the output stage is the only significant source of distortions (assuming the front end is decently designed), that needs a significant amount of loop gain to linearize.
Adding output devices is an easy way to linearize the output stage before feedback is applied. It falls under Cherry "bias" method, since adding output devices is equivalent to a single pair of output super-devices, with higher bias. However, adding output devices always increases the output stage size and wiring length (and also the equivalent Cgd, Ciss, etc...), to the point of diminishing return. Long wiring and increased other parasitics requires decreasing the ULGF (to compensate for the stray inductances, trace capacities, etc...) hence less loop gain is available for linearizing.
Therefore, from these contradicting effects, a sweet spot (from the distortions/stability trade perspective) in dimensioning the output stage exists. In my opinion, following some rough calculations of a 2 layer PCB traces inductances, stray capacitances and common vertical mosfets parameters, this is around 4-5 pairs of mosfet output devices (assuming the devices soldered directly to the PCB and attached to the heat sink). Over 5 pairs, the ULGF has to be lowered to avoid oscillations (so less loop gain), under 5 pairs, the output stage has increasing distortions at full output power. One reason why I don't like lateral mosfets is that you get to the 5 pairs limit before you get a significant transconductance (it's actually about 5:1 compared to the common verticals).
I have never seen an effective method of cancelling the output stage distortions, other than the Quad current dumping. Hawksford error correction derivatives, auto bias schemes, etc... are all (more or less local) negative feedback in disguise, and always come to the price of a phase shift added to the global feedback loop.
Adding output devices is an easy way to linearize the output stage before feedback is applied. It falls under Cherry "bias" method, since adding output devices is equivalent to a single pair of output super-devices, with higher bias. However, adding output devices always increases the output stage size and wiring length (and also the equivalent Cgd, Ciss, etc...), to the point of diminishing return. Long wiring and increased other parasitics requires decreasing the ULGF (to compensate for the stray inductances, trace capacities, etc...) hence less loop gain is available for linearizing.
Therefore, from these contradicting effects, a sweet spot (from the distortions/stability trade perspective) in dimensioning the output stage exists. In my opinion, following some rough calculations of a 2 layer PCB traces inductances, stray capacitances and common vertical mosfets parameters, this is around 4-5 pairs of mosfet output devices (assuming the devices soldered directly to the PCB and attached to the heat sink). Over 5 pairs, the ULGF has to be lowered to avoid oscillations (so less loop gain), under 5 pairs, the output stage has increasing distortions at full output power. One reason why I don't like lateral mosfets is that you get to the 5 pairs limit before you get a significant transconductance (it's actually about 5:1 compared to the common verticals).
I have never seen an effective method of cancelling the output stage distortions, other than the Quad current dumping. Hawksford error correction derivatives, auto bias schemes, etc... are all (more or less local) negative feedback in disguise, and always come to the price of a phase shift added to the global feedback loop.
Let's say that output stage is a main source of high order harmonics.
May-be worth a look at: http://www.diyaudio.com/forums/solid-state/221309-my-little-posh-tringlophone.html#post3196685 ?
Right.
Using OPS local feedback means that the ULGF has to be lower. This could be seen as an advantage. There's no need for a crazy high ULGF and could make pcb layout easier and less critical. There's something appealing about a sub 1Mhz ULGF.
Member
Joined 2009
Paid Member
That is correct, output stages with local feedback could be an advantage from a practical perspective.
Theoretically, it is not. Given the stability margins and the compensation(s), whatever way you splice and dice the loop gain the result will be the same.
Good luck with that, in particular after the amp warms up, when it rains outside, it's spring time, or the Gulfstream rises the atmospheric pressure.
Agreed. There is no free lunch.
Personally, from my battle with my first amp I fear any ULGF above 2MHz. Now prototyping a CFA with a modified HEC OPS with an overall amp ULGF of 500KHz. It'll be an interesting experiment...
Edit; Not 500MHz but 500KHz...
Last edited:
Did you noticed that I showed two different Loop Gains, and for ones where Cherry cap was not init Tian probe the ULGF was 1.7 MHz??
And when you say overshooting is obvious from the gain phase diagram, what it is so obvious? PM and GM are more then adequate.
I have not looked at your amplifier, but in general, if the amplifier is stable, PIM should not be a problem if the closed loop bandwidth is not moving around a lot with signal. Bear in mind that it is nearly impossible to have PIM without having 20kHz THD (the same nonlinearities that create PIM will create THD).
Cheers,
Bob
While the tempco of lateral MOSFETs is fairly flat around 150mA, laterals have fairly low transconductance. Verticals have a positive tempco at typical bias currents, but they offer much more transconductance and are not that difficult to get quite stable with temperature. See my comparison of vertical MOSFET temperature stability vs. BJT temp stability in my JAES paper on MOSFET amplifiers with error correction, available on my web site at CordellAudio.com - Home. A nice thing about MOSFETs is that you can bias them as high as you want without getting into gm doubling.
As an aside, Quad current dumping did not work well at output stage error correction either.
Cheers,
Bob
If you mean V4/5 in the #1426 circuit, they are just to get quick settling for the THD analyzer. They aren't there in a real amp and don't affect distortion.
As for R4/5, why don't you sim the circuit with mismatched resistors, BJTs etc.
_________________
Waly, why don't you do a simple 50W amp design incorporating your pet theories & features ... even just in SPICE world?
I'm asking totally without prejudice cos I'd really like to see you apply some of your undoubted expertise to something we can drool over.