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Buffalo III - flexibility without compromise.

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#921
Thank you!
OK, I tested in stereo mode: 4-Channel S/Pdif-4input board * Sidecar * One BIII * one Legato 3 * 2-bit rotary switch * volume control !
Wen I put spdif signal "Lock" LED flashing(regular pulses), sound is interrupted! On SW1 all switches is off, on SW2 all is off, less switch 8.
Can you suggest another configuration?
best,
hotzman
 
#922
Ditch the Sidecar and switch, connect the source to A. If possible, test it with a toslink module without the SPDIF board, toslink connected to D1. In general: make your configuration as simple as possible if you have a problem. Or swap out items to isolate the problem.
 
#923
So, it works in stereo mode! But had to exchange volum firmware with one I bought when I was Buffalo II (all version). Even so start after 5 minutes. Why can not I explain? Important is now I can listen to music!
For dual mono lest be "Volumit Firmware for Buffalo-II Stereo/Buffalo-II Dual Mono/Buffalo32S"? Is the same with "All Version" firmware?
Thanks!
 
#926
B-III DPLL settings?

Quick question: the integration guide describes the DPLL settings running from "highest" to "lowest".

To be entirely clear, does "highest"= widest bandwidth, and easiest lock on high jitter sources?
And, therefore, "lowest"=narrowest bandwidth, and best jitter rejection?
 
#930
B-III/ESS 9018 and DSD-volume control?

I presume that the ESS 9018's volume control is disabled when playing DSD, due to the single bit nature of DSD (handled in 6 bits in the ESS). Is this assumption correct, and if not, how could it be possible?
 
#931
DIP SW 1/8?

SW 1/8 is listed as the DPLL multiplier, with options of "on" for 128x, or "off" for 1x. My understanding is that this sets the the DPLL to either 128 or 1 times the settings achieved from SW 1/5, 1/6, and 1/7.
So the most narrow, best jitter rejection setting would be:

1/5: on, 1/6: off, 1/7: off sets at "lowest" & 1/8: off at 1x.

right?
 
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#933
Testing...

indicates the answer to my above question is "yes". The lowest setting I can maintain lock on with 352.8 is:

1/5: on
1/6: on
1/7: on=highest (widest bandwidth of the fine settings)

1/8: off= multiplier at 1x

I need to DL some 384 test files now to check if these settings will work, may have to go to the next setting wider:

1/5: on
1/6: off
1/7: off=lowest (most narrow bandwidth of the fine settings)

1/8: on=multiplier at 128x

Russ, previously you have mentioned that your proto XMOS device is working with very narrow DPLL settings. Can you confirm 384 sample rates locking consistentlty with:

1/5: on
1/6: off
1/7: off=lowest of the fine settings

1/8: off=1x multiplier?

If so, that is very impressive in comparison with my experience!
 
#939
I have to do the wiring for the power, outputs, inputs
Click to expand...
Simple copper wire (fi. AWG20-22) is fine for power, you could use thinner wire (22-24) for the I2C/I2S connections. A favorite for me are simple CAT5/6 strands of a good cable brand: it's very tightly controlled, high quality wire that is extremely affordable.
 
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