Hope I am not intruding the on-going discussion. Jacco's link, especially Fig. 3, just prompted me to post.
I have only received the book for a week or so, and have not really had a chance to go through it in detail yet. Instead, I just randomly picked a topic which I was (am) not familiar with and had some questions about -- CFP / Sziklai.
I found quite an extensive treatment on the subject in Bob's book, though most of the remarks tend towards negative. Perhaps rightly so, considering that the circuit is not more popular than it is. I also quickly checked through the relevant sections of the books by JLH & D.Self. The opinion seems a bit divided.
What I am missing is perhaps some simple theory / mathematical treatment as to how the parasitic oscillation can be avoided by design. I mean there are quite a number of parameters to play with, like fT of driver and power devices, Re (degeneration resistor) of driver & power devices, Rc of the driver BJT, I bias of the driver BJT, ...
Or is the topic so old that it is of little interest ?
Patrick
I have only received the book for a week or so, and have not really had a chance to go through it in detail yet. Instead, I just randomly picked a topic which I was (am) not familiar with and had some questions about -- CFP / Sziklai.
I found quite an extensive treatment on the subject in Bob's book, though most of the remarks tend towards negative. Perhaps rightly so, considering that the circuit is not more popular than it is. I also quickly checked through the relevant sections of the books by JLH & D.Self. The opinion seems a bit divided.
What I am missing is perhaps some simple theory / mathematical treatment as to how the parasitic oscillation can be avoided by design. I mean there are quite a number of parameters to play with, like fT of driver and power devices, Re (degeneration resistor) of driver & power devices, Rc of the driver BJT, I bias of the driver BJT, ...
Or is the topic so old that it is of little interest ?
Patrick
Hi Patrick,
These are good questions about CFP, and you are right in perceiving that opinions on the use of this circuit are divided.
There are at least two somewhat separable issues.
The first is stability. That has been a difficulty with this circuit for quite some time because it is a tightly coupled feedback pair wherein many of the parameters governing the FB stability are highly variable over output voltage and current.
The second is the misunderstanding that the local feedback in the CFP makes the CFP more linear and thus helps make the output stage more linear. The latter is simply not so. Making each half of a nonlinear class B output stage more linear does not necessarily make the overall stage more linear unless one ignores the details of the crossover region. The FB in the CFP greatly lowers the output impedance of each half of the output stage, so where they meet at the crossover point is much more abrupt and does not really follow Barney Oliver's law for optimized crossover. To get enough output impedance in the conventional CFP to have a civilized crossover usually requires that one starve the output transistors of idle current, which is a bad thing.
A third problem is that the output transistors in the CFP are not as readily turned off in the CFP arrangement, leading to dynamic crossover problems when there is a high rate of change of current.
Cheers,
Bob
Rude remarks removed. Please be polite.audio power amps typically have closed loop gains of 20x or more - defined by the inverse feedback attenuator divison ratio
you may want to think about the difference between the no feedback "open loop gain" of the amp circuit and "excesss" or "loop gain" - the former may reach the 0 dB line at tens of MHz, the latter curve is "shifted down" by the feedback atttenuation factor, the "closed loop gain" is the amp's response with the feedback included
for stability we look at behavior near the "loop gain intercept" where the "excess loop gain" drops to 0 dB or the feedback attenution defined closed loop gain "crosses" or "intercepts" the open loop gain curve - which may be in low MHz with today's fast output devices - for more fun/precision Bode defined "T" for return ratio/loop transmission factor and "F" for "return difference"feedback factor which you will also sometimes see in books/discussions
since this is Bob's book thread you could look at his fig 2.15
often you have to use context to determine which way "gain" is being used in a discussion - and that effort may depend on your estimate of wether someone on the web knows enough to make it worthwhile to understand them - language barriers, and different education/ engineering "cultures" may lead to confusion even among degreed EEs
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wahab,
physical reality is much more than just gain. You have wholeheartedly embraced the Op-Amp philosophy developed for industrial applications, justified by simulation softwares but importing it to audio is disastrous. You should liberate yourself from that worthless simulator and try to attain a more complete and impartial picture of reality.
physical reality is much more than just gain. You have wholeheartedly embraced the Op-Amp philosophy developed for industrial applications, justified by simulation softwares but importing it to audio is disastrous. You should liberate yourself from that worthless simulator and try to attain a more complete and impartial picture of reality.
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Hi Bob, so did I. I took the liberty to use (as you mentioned) schematic 3.10 in your book (BTW, excellent book, thank you!) and tried to reproduce and optimize your results regarding the Miller-TPC-TMC comparison. Obviously, 3.10 lacks a lot of features (base stoppers, proper device selection for thermal and SOA control, output Zobel and load isolation networks, etc...) that would make this a buildable amp, but for the sake of this discussion it is perfectly fine.
Using LTSpice and the Onsemi device models, only a little change in the bias spreader divider and the emitter resistors were required to provide the bias values in fig. 3.10 and 115mA (as you mentioned) through the MJL output devices.
By inserting a gain probe in series with the feedback resistor (I am using a Tian probe implemented in LTSpice) I got the low frequency loop gain of about 95dB and the uncompensated unity loop gain frequency of about 9MHz. These are reasonable values for a Blameless, much lower than the 130dB and 30-40MHz unity loop gain frequency, claimed by wahab and Edmond. I guess much higher values for the LF gain and unity loop gain frequency can be obtained by a more advanced topology, in particular using a mosfet output stage, however I don't think this would change much in the Miller-TPC-TMC comparison discussion (not to mention the implementation issues of a 11MHz compensated unity loop gain frequency). That's the reason why I was asking wahab for the schematic, to provide a common ground for the analysis.
Using the data in the table attached to your post, I first looked at the 14pF miller compensated amp. Here are the results (yours-mine), you didn't specify the output level for the THD20 determination, but I assumed it is 50W into 4ohm, that is 40Vpp output (2Vpp input).
Unity loop gain frequency: 1MHz - 0.97MHz
Phase margin: ? - 67 degrees
100Hz loop gain: 67dB - 79dB
20KHz loop gain: 34dB - 34dB
60KHz loop gain: 25dB - 24dB
Peak loop gain: NONE - NONE
THD20: 0.015% - 0.013%
7th harmonic fraction: 15E-6 - 15E-6
Slew rate: 50V/uS - 82V/uS
FR peaking: NONE - NONE
Overshoot: NONE - NONE
Overall, the comcordance between yours and mine results is pretty good. The loop gain I got at 100Hz is significantly higher than yours, don't know why, but I don't think this affect the HF results, anyway. The only worrysome difference is in the slew rate: you got 50V/uS, I got 82V/uS.
Now, here's the TPC results (again using the data and values in your table):
Unity loop gain frequency: 1MHz - 0.98MHz
Phase margin: ? - 62 degrees
100Hz loop gain: 68dB - 95dB
20KHz loop gain: 53dB - 51dB
60KHz loop gain: 33dB - 33dB
Peak loop gain: 87dB @ 7.9KHz - 101dB @ 1.5KHz
THD20: 0.007% - 0.009%
7th harmonic fraction: 11E-6 - 18E-6
Slew rate: 73V/uS - 98V/uS
FR peaking: +1dB @ 300KHz - +1dB @ 300KHz
Overshoot: 20% - 14%
The concordance is not that good, but still within the common sense range. The LF gain results (and the loop gain peaking) are shifted, while the HF loop gains are in very good concordance. I actually got worse THD20 results than yours (and much worse for the normalized 7th harmonic contribution). I also got the SR shifted up, but in good Miller/TPC ratio concordance with your results. However, the FR peaking results are spot on.
On to the TMC results (again using the data and values in your table):
Unity loop gain frequency: 1MHz - 0.98MHz
Phase margin: ? - 69 degrees
100Hz loop gain: 67dB - 79dB
20KHz loop gain: 33dB - 33dB
60KHz loop gain: 24dB - 23dB
Peak loop gain: NONE - NONE
THD20: 0.002% - 0.0034%
7th harmonic fraction: 11E-6 - 18E-6
Slew rate: 52V/uS - 86V/uS
FR peaking: NONE - NONE
Overshoot: NONE - NONE
Very consistent with your results (in particular for the HF loop gains), barring the same discrepancies in LF loop gain and slew rate. I got though a higher THD20 for this TMC implementation (34ppm, compared to your 20ppm) but still significantly lower than the non optimized TPC above (90ppm).
And now, here's an optimized TPC implementation. For a quick analysis, I took for C1 and C2 the TMC values (resulting in the same unity loop gain frequency) and varied the TPC resistor, to a relative optimum, found at about 5kohm. Please note that this is not an absolute optimum, but only a relative one, by re-using as much as possible from the Miller and TMC configurations in your earlier post.
Unity loop gain frequency: ? - 1.01MHz
Phase margin: ? - 62 degrees
100Hz loop gain: ? - 95dB
20KHz loop gain: ? - 60dB
60KHz loop gain: ? - 41dB
Peak loop gain: ? - 101dB @ 2.3KHz
THD20: ? - 0.0039%
7th harmonic fraction: ? - 22E-6
Slew rate: ? - 121V/uS
FR peaking: ? - +2.4dB @ 300KHz
Overshoot: ? - 24%
Everybody can now appreciate what are the differences between Miller, your suboptimal TPC, a relative optimal TPC and TMC. Being around 10%, and this being a quick and dirty exercise, the differences are, to me, at best marginal if at all. As I originally stated, while mantaining about the same unity loop gain frequency (o.98MHz vs. 1.01MHz) and about the same phase margin (69 degrees vs. 62 degrees) TMC and the relative optimal TPC are delivering about the same THD20 (34ppm vs. 39ppm). As already mentioned, the differences are in the frequency domain (the phase dip, but even so, the optimal TPC amp is here still unconditionally stable) and the corresponding (in the time domain) slew rate increase (86V/uS vs. 121V/uS) and the oveshoot (none vs. 24%). As I already mentioned I have absolutely no proof that the overshoot (typical for any second order system) matters, if properly limited by the input filter cell.
It would be really interesting to find out if there is any topology that would reveal a significant advantage of TMC over TPC (certainly, for a blameless amp, those differences are (or can be made) pretty much nil). Meantime, the challenge I have mentioned in a previous message holds.
And finally, I have to quote Edmond from an older post of him (isn't the search feature great?), here: http://www.diyaudio.com/forums/soli...ogy-construction-troubles-17.html#post2274343 I 100% agree
"As you know, TPC increases the loop gain of the whole amp, while TMC increases the loop gain as far as the output stage is concerned. As long as the latter is the main culprit of distortion, both methods will show the same reduction in THD."
Hope I haven't missed or messed up anything, such things are easily growing pretty hairy.
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Hi jcx, thanks for the hint, that's exactly the reason why I asked for schematics and details. I am myself suspecting a confusion between the open loop unity gain frequency and unity loop gain frequency. Without such details and specifics, just slapping a statement about 40MHz unity gain frequency and 11MHz closed loop unity gain frequency are not really telling much.
A typical triple bipolar blameless amp would have an uncompensated unity loop gain frequency of 10MHz or so (see Bob's example above), while the compensated unity loop gain frequency would be of 1-2, perhaps 3MHz (but that's already a stretch).
EDIT: I took a quick look at Fig. 2.15 in Bob's book at it shows exactly a unity loop gain frequency of 10MHz. Where are those 40MHz coming from, I don't know.
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you might try moving around the gain probe - "inside" both the global and tmc resistor I see very nearly the same gain curve around the output device with the "simple Middlebrook" voltage probe but with a larger intercept frequency difference using identical TMC/TPC Cap values - I haven't looked inside the VAS yet but that could reveal if TMC "bootstrapping" of the Cdom gives a useful increase in VAS loop internal gain - which could increase its linearity driving the nonlinear output stage
also I've seen the asymmetric C values reversed in order in TPC vs TMC - that would also change VAS load
also I've seen the asymmetric C values reversed in order in TPC vs TMC - that would also change VAS load
Hi Patrick,
The output impedance of the amplifier built with a CFP output stage is not necessarily lower than that of an emitter follower based output stage if both stages use the same value of RE, since RE dominates the output impedance at high output current outside the crossover region if the impedance of the circuit driving the output stage is low and total beta of the output stage is high. This condition is usually well-satisfied with a Locanthi Triple fed with a Miller-compensated Darlington VAS.
It is true that bias stability is better in the CFP because the Vbe in the output transistor is taken out of the picture to first order. Instead, the Vbe of the driver is most important in setting the bias in the CFP. The driver, of course, is subject to much less thermal variation.
However, the CFP is much more sensitive to a few millivolts of bias spreading change, since it places a much smaller voltage across RE, with lower idle bias. The quasi class A region of the CFP, where both transistors are contributing to output stage transconductance, is very small if the CFP is not biased into overt gm doubling.
Look carefully in Doug's book at his CFP design and how it is biased.
Finally, the conventional CFP, being essentially a Double, simply does not have enough current gain to make a really good amplifier. You really need a Triple (not that you cannot make a CFP into a Triple by preceding it with an emitter follower pre-driver).
Cheers,
Bob
Hi Bob, so did I. I took the liberty to use (as you mentioned) schematic 3.10 in your book (BTW, excellent book, thank you!) and tried to reproduce and optimize your results regarding the Miller-TPC-TMC comparison. Obviously, 3.10 lacks a lot of features (base stoppers, proper device selection for thermal and SOA control, output Zobel and load isolation networks, etc...) that would make this a buildable amp, but for the sake of this discussion it is perfectly fine.
Using LTSpice and the Onsemi device models, only a little change in the bias spreader divider and the emitter resistors were required to provide the bias values in fig. 3.10 and 115mA (as you mentioned) through the MJL output devices.
By inserting a gain probe in series with the feedback resistor (I am using a Tian probe implemented in LTSpice) I got the low frequency loop gain of about 95dB and the uncompensated unity loop gain frequency of about 9MHz. These are reasonable values for a Blameless, much lower than the 130dB and 30-40MHz unity loop gain frequency, claimed by wahab and Edmond. I guess much higher values for the LF gain and unity loop gain frequency can be obtained by a more advanced topology, in particular using a mosfet output stage, however I don't think this would change much in the Miller-TPC-TMC comparison discussion (not to mention the implementation issues of a 11MHz compensated unity loop gain frequency). That's the reason why I was asking wahab for the schematic, to provide a common ground for the analysis.
Using the data in the table attached to your post, I first looked at the 14pF miller compensated amp. Here are the results (yours-mine), you didn't specify the output level for the THD20 determination, but I assumed it is 50W into 4ohm, that is 40Vpp output (2Vpp input).
Unity loop gain frequency: 1MHz - 0.97MHz
Phase margin: ? - 67 degrees
100Hz loop gain: 67dB - 79dB
20KHz loop gain: 34dB - 34dB
60KHz loop gain: 25dB - 24dB
Peak loop gain: NONE - NONE
THD20: 0.015% - 0.013%
7th harmonic fraction: 15E-6 - 15E-6
Slew rate: 50V/uS - 82V/uS
FR peaking: NONE - NONE
Overshoot: NONE - NONE
Overall, the comcordance between yours and mine results is pretty good. The loop gain I got at 100Hz is significantly higher than yours, don't know why, but I don't think this affect the HF results, anyway. The only worrysome difference is in the slew rate: you got 50V/uS, I got 82V/uS.
Now, here's the TPC results (again using the data and values in your table):
Unity loop gain frequency: 1MHz - 0.98MHz
Phase margin: ? - 62 degrees
100Hz loop gain: 68dB - 95dB
20KHz loop gain: 53dB - 51dB
60KHz loop gain: 33dB - 33dB
Peak loop gain: 87dB @ 7.9KHz - 101dB @ 1.5KHz
THD20: 0.007% - 0.009%
7th harmonic fraction: 11E-6 - 18E-6
Slew rate: 73V/uS - 98V/uS
FR peaking: +1dB @ 300KHz - +1dB @ 300KHz
Overshoot: 20% - 14%
The concordance is not that good, but still within the common sense range. The LF gain results (and the loop gain peaking) are shifted, while the HF loop gains are in very good concordance. I actually got worse THD20 results than yours (and much worse for the normalized 7th harmonic contribution). I also got the SR shifted up, but in good Miller/TPC ratio concordance with your results. However, the FR peaking results are spot on.
On to the TMC results (again using the data and values in your table):
Unity loop gain frequency: 1MHz - 0.98MHz
Phase margin: ? - 69 degrees
100Hz loop gain: 67dB - 79dB
20KHz loop gain: 33dB - 33dB
60KHz loop gain: 24dB - 23dB
Peak loop gain: NONE - NONE
THD20: 0.002% - 0.0034%
7th harmonic fraction: 11E-6 - 18E-6
Slew rate: 52V/uS - 86V/uS
FR peaking: NONE - NONE
Overshoot: NONE - NONE
Very consistent with your results (in particular for the HF loop gains), barring the same discrepancies in LF loop gain and slew rate. I got though a higher THD20 for this TMC implementation (34ppm, compared to your 20ppm) but still significantly lower than the non optimized TPC above (90ppm).
And now, here's an optimized TPC implementation. For a quick analysis, I took for C1 and C2 the TMC values (resulting in the same unity loop gain frequency) and varied the TPC resistor, to a relative optimum, found at about 5kohm. Please note that this is not an absolute optimum, but only a relative one, by re-using as much as possible from the Miller and TMC configurations in your earlier post.
Unity loop gain frequency: ? - 1.01MHz
Phase margin: ? - 62 degrees
100Hz loop gain: ? - 95dB
20KHz loop gain: ? - 60dB
60KHz loop gain: ? - 41dB
Peak loop gain: ? - 101dB @ 2.3KHz
THD20: ? - 0.0039%
7th harmonic fraction: ? - 22E-6
Slew rate: ? - 121V/uS
FR peaking: ? - +2.4dB @ 300KHz
Overshoot: ? - 24%
Everybody can now appreciate what are the differences between Miller, your suboptimal TPC, a relative optimal TPC and TMC. Being around 10%, and this being a quick and dirty exercise, the differences are, to me, at best marginal if at all. As I originally stated, while mantaining about the same unity loop gain frequency (o.98MHz vs. 1.01MHz) and about the same phase margin (69 degrees vs. 62 degrees) TMC and the relative optimal TPC are delivering about the same THD20 (34ppm vs. 39ppm). As already mentioned, the differences are in the frequency domain (the phase dip, but even so, the optimal TPC amp is here still unconditionally stable) and the corresponding (in the time domain) slew rate increase (86V/uS vs. 121V/uS) and the oveshoot (none vs. 24%). As I already mentioned I have absolutely no proof that the overshoot (typical for any second order system) matters, if properly limited by the input filter cell.
It would be really interesting to find out if there is any topology that would reveal a significant advantage of TMC over TPC (certainly, for a blameless amp, those differences are (or can be made) pretty much nil). Meantime, the challenge I have mentioned in a previous message holds.
And finally, I have to quote Edmond from an older post of him (isn't the search feature great?), here: http://www.diyaudio.com/forums/soli...ogy-construction-troubles-17.html#post2274343 I 100% agree
"As you know, TPC increases the loop gain of the whole amp, while TMC increases the loop gain as far as the output stage is concerned. As long as the latter is the main culprit of distortion, both methods will show the same reduction in THD."
Hope I haven't missed or messed up anything, such things are easily growing pretty hairy.
Hi Ywn,
Good work! The correspondence between our results is quite good, in spite of the fact that you and I are using different transistor models (the ones I used are the ones I have developed and/or tweaked that I will be posting on my web site very soon). The differences in the models may account for some of the low-frequency loop gain differences.
It appears you may have an error in the 7th harmonic fraction for my TMC results. The right number for my result is 3ppm, not 11ppm. You may have also erred in reporting your own result as well. You quote 22ppm for 7th harmonic with optimized TPC - I suspect that may be in error as well.
It still all seems to come down to what we consider to be acceptable in terms of allowed peaking for TPC. Also look at how low the phase dips at its lowest point in TMC. A really deep dip makes me nervous.
I'm not sure why your slew rate numbers are better. However, in measuring slew rate, one will often find that the slew rate is not uniform over the slewing portion of the waveform, especially for more complex forms of compensation. In all cases, where there was a difference, I chose the smaller rate of change somewhere in the middle of the signal swing.
Cheers,
Bob
Bob,
Would you please remark on your impressions of using a CFP as a driver stage a la Roender's amp?
http://www.diyaudio.com/forums/solid-state/111756-rmi-fc100-single-stage-audio-power-amplifier.html#post1349109
I believe he suggested upping the bias in the driver to around 100ma, though.
or adding an EF follower after the CFP.
The CFP part is the pre-driver and driver.
The output part is the Follower or pairs of Followers.
Do the pre-driver and driver of the CFP run in true ClassA all the time, when not overloaded?
And only the output EF runs in ClassAB?
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Hi Bob, thanks, to me, as an EE student with a passion for audio, going through these was certainly a good exercise. Yes, there are a few errors in the results (copy/pasted from/into the wrong places), I'll fix them asap. I am also sure the slew rate inconsistencies are the result of a different way of looking at the pulse response slopes. I was looking at 10%-90% per the SR definition, disregarding any particular response shape. I have double checked, and even the Miller compensated version has a slight 8% overshoot on the negative slope! Clearly, this amp is not ideal for such an investigation, but still the results are consistent and speaking for themselves.
I think this is the key of the problem. Please understand that I am myself not trying to slain the TMC beast (I see there are lots of sensitivities, passions and egos gravitating around this concept). TMC is a very ingenious and valuable technique to compensate an amp and certainly deserves more attention than it got so far. The linear phase feature is very nice to have, however, it should be clearly understood that TMC does not create more loop gain than TPC. It only uses the same amount of loop gain as TPC, but in a different way. Rather than linearizing the entire amp, it uses most of the loop gain as kinda "local feedback" for linearizing the main source of distortions, that is the output stage. From the above example, I think this behaviour is clear now.
I also followed the link that stinius provided here, and although that reference does not give a proof in a "theorem" sense, it is a very good theoretical justification for the above simulation results. It's indeed a pity that the author has no interest to pursue this matter here.
Otherwise, again, TMC is a very valuable technique, and giving the fact that it is virtually free it is certainly worth implementing in any amp that supports it (essentially, where the VAS gain is large enough, and the VAS is also linear enough). Of course, more theoretical analysis is required, to identify the limitations, trade-offs, inflexion/critical points (if any), optimum design rules, etc...
Now, back to my search and scan in lurk mode
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Hi Pooge,
Using a CFP as a driver in a Triple (where the output devices are emitter followers) is perfectly fine. Running drivers at a fairly high bias current is a good thing because it helps the output transistors turn of quickly enough when the output current rate of change is high.
Cheers,
Bob