Bob Cordell's Power amplifier book

DBLTs that HAVE been carried out on amps and their implications for design. Jan_Didden has been involved in some this Millenium and they confirm stuff that I was involved with in the previous century. WARNING : results are heretical to both audiophools & objectivists
This is the DBLT stuff which I referred to earlier and there is good 'objective' criteria and backing for having this in your book.

The bandwidth limitation stuff is of course heretical to both objectivists & Golden Pinnae alike but I think you should at least mention it as the properly gathered hard evidence appears to be unanimous.
But I'm not asking for debate .. only that you list whatever tests are in the public domain & their results.
Please could you provide the relevant references? I am very interested but have no idea which tests you are talking about or where to find the published results.

I don’t see how the results of a properly-conducted DBLT could possibly be against the “faith” of objectivists.
Perhaps the 2 most important results pertaining to amps are on 'soft clipping' and 'bandwidth limitation'.

I've conducted a number of tests on both but the results exist only in internal Engineering Memos.

Of the 'public' tests I have been involved with, KEF tested the 'general public' at a London AES Convention in the 80's. This was an important datapoint for me as it confirmed the good performance of a number of my own golden pinnae panel. Alas Laurie Fincham was always selfish with the complete data set .. even that gathered with the help of others.

Jan detailed his AES, Netherlands (IIRC) 21st century test in an earlier post. I don't think anything formal has been published.

I'm rather surprised that he got the same result as I did cos this Millenium, ALL sensible music sources are already heavily band-limited.

He used an FM multiplex filter with 15kHz brickwall. I (and KEF) used one too but screwed up so that it ju..ust made 20kHz.

If anyone knows of more such DBLTs, anecdotal or not, please tell us.

1. It is plausible that any difference in amplifier behaviour that is measurable could possibly but doesn’t necessarily cause an audible difference.
.. which is what a DBLT checks out. If there IS an audible difference .. ONLY then do you ask if there is a preference .. and ONLY from those who can detect the difference reliably.

3. What “sounds good” is not necessarily maximum fidelity.
I design stuff to SOUND GOOD. I use to believe that if it sounded better, the customer was more likely to buy it.

But today, the buyer has little or no chance of listening to something before buying so perhaps the 'hand carved from solid Unobtainium by Virgins' story is now parasound .. and hang what it sounds like. :mad:

It's just that IME, the accurate stuff is usually what sounds best. The 'bandwidth limitation' & 'soft clipping'stuff are some of the very few inaccurate things with reliable preference.

In the meantime, while Alan screams "Impossible! Where's your theory for this result? The earth is obviously flat!" .. if you want your amp to be reliably preferred to others in DBLTs, use a brickwall filter between 15-20kHz at its input.

Here's one test that HAS been formally reported http://ejjamps.com/PDF/experiment-that-saved-high-fidelity.pdf

We've come a long way since 1947 .. or maybe not. :)
 
Ha ha, my question is which one sounds better!!! I want the one that sound better, hell with the IM, THD and all.
Which one? I really like to know.
The way to find out is to conduct a DBLT.

May I suggest you construct a simple 2x50W 8R amp. ... perhaps the truly EVIL one in Fig 6.16 APAD4 which only has one paltry pair of output devices :eek:

Provided you don't botch this, it will be a good benchmark to conduct DBLTs to compare with your own design with zillion output pairs and running zillion Amps Iq.

As your design is somewhat less powerful than 50W, my guess is that Fig 6.16 will be preferred by those who can tell the difference .. based purely on my experience with DBLTs of course ;)
 
The way to find out is to conduct a DBLT.

May I suggest you construct a simple 2x50W 8R amp. ... perhaps the truly EVIL one in Fig 6.16 APAD4 which only has one paltry pair of output devices :eek:
I only have APAD6, I won't buy the APAD4. ha ha, you really not going to tell me?:D

I don't think I am going to do a very high bias and low power amp. I am seriously consider settling with 0.22, 0.6A Iq and 40V rail, that will give me over 100W. High current is just too hot.

I think the next OPS for me is going to be 8 stages but still 0.22 or slightly higher with Oliver's condition. I am going to use more stages to smooth out the kink of the crossover distortion instead of doing big class A region.
 
Last edited:
I only have APAD6, I won't buy the APAD4. ha ha, you really not going to tell me?:D
If you scan & post Fig 6.16 in APAD6, I can tell you whether its the same as in APAD4. I'm sure Doug won't mind as its for educational purposes.

I only made the suggestion cos you said you wanted the one that sounded best and hell with the IM, THD and all. I now see I was mistaken :)
 
Last edited:
Alan I just fail to see why you are having to use 8 pairs of output devices to produce no more usable power than Ostripper is getting from two pairs of MT-200 Sanken devices. It seems you are chasing theoretical perfection rather than practical working amplifiers. I would go and read the CFA vs VFA thread by Ostripper from the very beginning of that thread. I can't comment on what you are doing but it just doesn't seem that you are doing anything like most designers with the goals of similar output power with very low distortion numbers.
 
The way to find out is to conduct a DBLT.

May I suggest you construct a simple 2x50W 8R amp. ... perhaps the truly EVIL one in Fig 6.16 APAD4 which only has one paltry pair of output devices :eek:

Provided you don't botch this, it will be a good benchmark to conduct DBLTs to compare with your own design with zillion output pairs and running zillion Amps Iq.

As your design is somewhat less powerful than 50W, my guess is that Fig 6.16 will be preferred by those who can tell the difference .. based purely on my experience with DBLTs of course ;)

Are you referring to the Blameless design with TR2 and TR3 PNP LTP. TR10 and TR11 NPN current mirror load. VAS is darlington connected TR12 and TR4. Then driving a 2EF with output transistor TR7 and TR9.

That is Fig. 6.19 in APAD6.

I do have an Acurus 200W amp to use as DBLT. I gave it a tune up, adding more caps, beefed up ground and tuned to Oliver's condition. It is a pretty good sounding amp already. It is in the same class as Adcom, Parasound type of middle of the road amps. I actually consider buying a Threshold on ebay when one was for sale for about $1600.
 
Last edited:
Alan I just fail to see why you are having to use 8 pairs of output devices to produce no more usable power than Ostripper is getting from two pairs of MT-200 Sanken devices. It seems you are chasing theoretical perfection rather than practical working amplifiers. I would go and read the CFA vs VFA thread by Ostripper from the very beginning of that thread. I can't comment on what you are doing but it just doesn't seem that you are doing anything like most designers with the goals of similar output power with very low distortion numbers.

If you look at APAD6 p266 to 269 where Self talked about crossover distortion vs multiple output pairs. More pairs will flatten the kink at the crossover distortion which move the harmonics to lower frequency and get better cancellation using negative feedback.

Look at it in another way. It is very well establish the you get lower distortion with a given OPS if the load resistance is made higher. For example, if you have two pairs of transistor, if you drive a 4ohm load, each pair sees an equivalent of 2 X 4ohm=8ohm load. You lower distortion. If you use 4 pairs, each pair sees the equivalent load resistance of 4 X 4ohm = 16ohm. You can see more output pairs definitely lower distortion. this is definitely a sound theory.

Then another way to look at it in terms of output impedance. More pairs make the equivalent Re lower by the number of pairs. It is known that lower output impedance the gain of the EF stage approach unity and lower distortion.

This is clearly shown in Fig.10.17 in p269 of APAD6.

Also, the bonus is I have a much wider selection of transistors as I don't need high power. I can choose even TO-220 and find ones that are higher beta and lower Cob.

If you look at the very high end amplifiers like Krell and Threshold, they mostly have many output pairs in parallel.
 
Last edited:
Alan,
The thing is at the level of distortion that even with a two pairs output with the MT-200 output transistors the level is so low it is below your level of hearing. This would be at over 100 watts @ 8 0hms with properly sized heatsinks. That is what I think Kgrlee's point is also making, that without hearing what you are designing and listening to it you are just playing with numbers, but the numbers in a properly designed amplifier are so low you can't her the difference even if you halve the distortion, the levels are just so low. Ostripper who is using a maximum of five pairs, usually bjt devices, is at below 10 ppm distortion, you can't hear that so why try and get that to 5 ppm and he is producing in the neighborhood of 250 watts @ 8 ohms? It is just pointless at that level to chase lower distortion. I understand that you are correct theoretically and actually but it becomes just an exercise rather than a necessary result. Your problem is obviously that you have severely undersized your heatsinks and can not use your devices anywhere near there capability and that is also why you are having to run such low rail voltages. Ostripper is running in the area of 80 volts rail voltage, your design is seriously handicapped.
 
Yes, I made the mistake to buy that long narrow heatsink. That really handicap my testing. I thought that's good enough for using in the prototype platform. I might have to consider buying a bigger heat sink even for testing.

The heat sink in my real chassis are much bigger, it's at least two and half times the size and thickness.
 
Hi Kindhornman

I was thinking about what you said about distortion is too low to make a difference. But is that really true? More pairs mainly lower the crossover distortion. Crossover distortion remain constant regardless of volume, the lower the volume, the relative distortion goes up. This really affect the low volume listening the most. I am not so sure I can agree that it is too low to matter.

I can agree with the normal amplifier distortion, some even say even harmonic sound more musical. But I don't think crossover distortion is anything like that. People go class A just to eliminate crossover distortion.
 
Indeed. I'm surprised it's taken this long for someone to point that out.

Alan needs to read chapter 14 of Bob's book more carefully. In particular, section 14.8 talks specifically about manipulating the temperature coefficient of the bias spreader.

Actually I did not forget Cpt 14, I thought you meant somewhere else. In fact I read it many times before and I remember this chapter. Most do not help me as I use 3EF diamond. I only need 2Vbe compensation. All the fancy ones are for more Vbe compensation that I cannot use. Mr. Cordell did not explain about the variation of tempco and how to deal with it at all. What I encountered was totally new to me. Bonsai actually have an article specifically talking about it. Explaining how to use two point compensation, setting the slope and intercept.
 
I just redid a bunch of calculations and contemplating of where to set margins.

The problem with 0.1R degeneration resistors is that at 60V rails they are only really thermally stable at idle bias. If the bias goes up, it is almost impossible to make them stable.

The problem with this is that, for a worst case Tj of 150C, the bias will jump 330mV for several seconds before the thermal compensation can kick in. Since current hogging occurs at the junction, it can be over in 100mS. So you have a period of several seconds before the Vbe multiplier kicks in where current hogging is likely to occur.

So really, we should be calculating thermal stability at 150C before the Vbe multiplier kicks in. When you do this you discover that there are benefits to going larger than even 0.22R. Matched 250W BJTs at 60V mounted directly to a heat spreader can just barely handle 150C without current hogging, based on my estimations.
It seems you are discussing the case that R.Cordell brought up in the interviews.
The Instantaneous Thermal Stability (ITS) of each individual transistor needs to be analysed. It has come up in this Thread.
Vsupply, Re and Rth j-c are all inter-related.
Low rails with low Re can be stable. High rails require higher Re to be equally stable.

Kean's later post
Alan, the problem occurs when the devices get really hot before the Vbe multiplier can kick in - 150C in worst case. Furthermore, thermal gain is proportional to Vce so 25V is not enough to show dangerous behavior. These results aren't applicable to 60V rails.
confirms that one must look at trying to maintain similar Instantaneous Thermal Stability for comparisons to be valid.
Simply asking a stable +-25Vdc amplifier to now work @ +-60Vdc is not a fair comparison.
Some adjustments are REQUIRED to be made to ensure that ITS is adequate.
 
Last edited:
...........................

Also, the bonus is I have a much wider selection of transistors as I don't need high power. I can choose even TO-220 and find ones that are higher beta and lower Cob...................
I have suggested a 10pr MJE15034/5 output stage a few times on this Forum.
That gives a 1kW stage, which results in a 200W ClassAB amplifier.
Ost's 2pr of Sanken is a 800W stage resulting in a 160W ClassAB amplifier.

The slightly higher dissipation capability of the 10pr would allow a smaller heatsink, or a higher bias (more ClassA) than the 800W stage. But they are substantially the same.

The 5pair of 180W or 200W devices would result in a 360W to 400W ClassAB amplifier. Aiming for 100W is wasting resources.
Either go ClassA, or set a more sensible ClassAB power target.
 
Last edited:
Actually I did not forget Cpt 14, I thought you meant somewhere else. In fact I read it many times before and I remember this chapter. Most do not help me as I use 3EF diamond. I only need 2Vbe compensation. All the fancy ones are for more Vbe compensation that I cannot use. Mr. Cordell did not explain about the variation of tempco and how to deal with it at all. What I encountered was totally new to me. Bonsai actually have an article specifically talking about it. Explaining how to use two point compensation, setting the slope and intercept.
I am left wondering why the MJW results in good tempco?

Could it be due to the very low current density through the MJW. It is a 15A device passing somewhere around 10mA. The Vbe will be <<600mVbe and the tempco >>2mV/C

Is it this combination of very low Vbe and higher tempco that results in the much better static compensation.

Is so, then this fits with Roender's analysis of the TT diodes where he used 5 diodes at very low current to get the tempco where it needed to be, while still maintaining a lowish 4*Vbe bias voltage.
 
Last edited:
......................
7) The 4th column is the sum of the first three column. This is what AmdrewT wants to plot the graph.....................
It shows a big variation in hFE.
+15% for the NPN and +32% for the PNP.
This is due to different Tj, different Re values, different Rb values.

And your guess for the red value (3.3mV) is actually too high. It will be lower than your estimate and make my calculation of +32% look a lot better. I'd guess it should be around 3mV to 3.1mV
 
Last edited:
Yes, for over $60 a pop, I do expect more. don't want to share the secret, do a short form cook book style and charge $20. I read plenty of books in electronics, each and every single one explain why, not just saying it just is.

This sort of comment is what makes writing long technical books so very satisfying. Thanks.

I will say once more that there are no secrets withheld in APAD6 that affect basic amplifier design. I suggest it has more reasoned explanation and more illustrative measurement than most books on the topic, to put it at its mildest.

Have I told all I know? Of course not. I like to eat. APADn is always a few steps behind what I am doing for money. How could it be otherwise?

Now excuse me, I have work to do.
 
R.Cordell has a big section on arranging different Tempco for the multiplier.

I think part of your problem and it affects all of us, is that the temperature range of the sensor is much lower than the temperature range of the output stages (driver + Output).
If the driver + output has 4 Vbe and each sees a temp range of 20C degrees, and the Multiplier/sensor sees 10Cdegrees of temperature range, then a tempco for the sensor needs to be equivalent to 8Vbe*50%, to apply the required 4Vbe correction.
If the drivers have a temperature range that is significantly less than the outputs, then your sensor tempco can be a bit less.
If the sensor is inside the outputs, then this location is very likely to have the highest temperature range cf all the other "external sensor locations"

This is a very good point. It goes to the matter of "thermal attenuation" between the transistor junction and the sensor junction. Even on a static long-term basis there will be thermal attenuation, meaning that if the power transistor junction changes by 10C, the sensor junction might change by only 5C. This thermal attenuation mechanism can be seen by looking at the thermal model that shows the thermal path from the power transistor junction to wherever the sensor junction is. It amounts to a resistive divider, where the heat sink thermal resistance is the shunt resistor.

Note that when you mount the sensor on top of the output transistor and the driver in an EF output stage on the heat sink, you get two paths of temperature compensation, giving more total TC for compensation. One is more fast-acting and one is more slow-acting.

Cheers,
Bob